C8051F705-GM Silicon Laboratories Inc, C8051F705-GM Datasheet - Page 182

• Manufacturer Part Number: C8051F705-GM
• Description: IC 8051 MCU 15K FLASH 48-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F70xr

Specifications of C8051F705-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 15KB (15K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 32 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• Processor Series: C8051F7x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F700DK
• Minimum Operating Temperature: - 40 C
• Height: 0.95 mm
• Length: 7 mm
• Supply Voltage (max): 1.9 V, 3.6 V
• Supply Voltage (min): 1.7 V, 1.8 V
• Width: 7 mm
• For Use With: 336-1635 - DEV KIT FOR C8051F700
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1612-5

C8051F70x/71x
28.1.3. Interfacing Port I/O to 5 V Logic
All Port I/O configured for digital, open-drain operation are capable of interfacing to digital logic operating at
a supply voltage up to 2 V higher than VDD and less than 5.25 V. An external pull-up resistor to the higher
supply voltage is typically required for most systems.
Important Note: In a multi-voltage interface, the external pull-up resistor should be sized to allow a current
of at least 150 µA to flow into the Port pin when the supply voltage is between (VDD + 0. 6V) and
(VDD + 1.0V). Once the Port pin voltage increases beyond this range, the current flowing into the Port pin
is minimal. Figure 28.3 shows the input current characteristics of port pins driven above VDD. The port pin
requires 150 µA peak overdrive current when its voltage reaches approximately (VDD + 0.7 V).
28.1.4. Increasing Port I/O Drive Strength
Port I/O output drivers support a high and low drive strength; the default is low drive strength. The drive
strength of a Port I/O can be configured using the PnDRV registers. See Section “9. Electrical Characteris-
tics” on page 47 for the difference in output drive strength between the two modes.
28.2. Assigning Port I/O Pins to Analog and Digital Functions
Port I/O pins P0.0–P2.7 can be assigned to various analog, digital, and external interrupt functions. The
Port pins assigned to analog functions should be configured for analog I/O, and Port pins assigned to digi-
tal or external interrupt functions should be configured for digital I/O.
28.2.1. Assigning Port I/O Pins to Analog Functions
Table 28.1 shows all available analog functions that require Port I/O assignments. Port pins selected for
these analog functions should have their corresponding bit in PnSKIP set to 1. This reserves the pin
for use by the analog function and does not allow it to be claimed by the Crossbar. Table 28.1 shows the
potential mapping of Port I/O to each analog function.
182
Port I/O Overdrive Test Circuit
V
Cell
I/O
DD
I
Vtest
Figure 28.3. Port I/O Overdrive Current
+
-
V
test
Rev. 1.0
I
(µA)
Vtest
Port I/O Overdrive Current vs. Voltage
-150
-10
0
V
DD
V
test
V
DD
(V)
+0.7