MC56F8013VFAE Freescale Semiconductor, MC56F8013VFAE Datasheet - Page 70

• Manufacturer Part Number: MC56F8013VFAE
• Description: IC DIGITAL SIGNAL CTLR 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8013VFAE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 2K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: MC56F80xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 32 MIPs
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 26
• Data Ram Size: 4 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Rom Size: 16 KB
• Development Tools By Supplier: MC56F8037EVM, DEMO56F8014-EE, DEMO56F8013-EE
• Interface Type: SCI, SPI, I2C
• Minimum Operating Temperature: - 40 C
• For Use With: CPA56F8013 - BOARD SOCKET FOR MC56F8013APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEMDEMO56F8013-EE - BOARD DEMO FOR 56F8013
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

(COP) timer. It will not be set if an external or POR reset also occurred. If COPR is set as code starts
executing, the COP reset vector in the vector table will be used. Otherwise, the normal reset vector is used.
6.3.2.4
When set, this bit indicates that the previous system reset was caused by an external reset. It will only be
set if the external reset pin was asserted or remained asserted after the Power-On Reset deasserted.
6.3.2.5
This bit is set during a Power-On Reset.
6.3.2.6
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.3.3
Only SIM_SWC0 is shown in this section. SIM_SWC1, SIM_SWC2, and SIM_SWC3 are identical in
functionality.
6.3.3.1
This register is reset only by the Power-On Reset (POR). It has no part-specific functionality and is
intended for use by a software developer to contain data that will be unaffected by the other reset sources
(RESET pin, software reset, and COP reset).
6.3.4
This read-only register displays the most significant half of the JTAG ID for the chip. This register reads
$01F2.
70
Base + $2
Base + $6
RESET
RESET
Read
Write
Read
Write
SIM Software Control Registers (SIM_SWC0, SIM_SWC1,
SIM_SWC2, and SIM_SWC3)
Most Significant Half of JTAG ID (SIM_MSHID)
External Reset (EXTR)—Bit 3
Power-On Reset (POR)—Bit 2
Reserved—Bits 1–0
Software Control Data 0 (FIELD)—Bits 15–0
15
15
0
0
0
Figure 6-5 Most Significant Half of JTAG ID (SIM_MSHID)
Figure 6-4 SIM Software Control Register 0 (SIM_SWC0)
14
14
0
0
0
13
13
0
0
0
12
12
0
0
0
56F8013/56F8011 Data Sheet, Rev. 12
11
11
0
0
0
10
10
0
0
0
Software Control Data 0
9
0
9
0
0
8
8
0
1
1
7
7
0
1
1
6
6
0
1
1
5
0
5
1
1
4
0
4
1
1
3
3
0
0
0
Freescale Semiconductor
2
0
2
0
0
1
0
1
1
1
0
0
0
0
0