HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 357
HD64F7047F50V
Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Specifications of HD64F7047F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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- Current page: 357 of 766
- Download datasheet (5Mb)
POE Timing: Figure 10.117 shows an example of timing from POE input to high impedance of
pin.
10.9.5
1. To set the POE pin as a level-detective pin, a high level signal must be firstly input to the POE
2. To clear bits POE0F, POE1F, POE2F, POE3F, and OSF to 0, read registers ICSR1 and OCSR.
pin.
Clear bits, which are read as 1, to 0, and write 1 to the other bits in the registers.
CK
POE input
PE9/
TIOC3B
Note: Other large-current pins (PE11/TICO3D, PE12/TIOC4A, PE13/TIOC4B/MRES, PE14/TIOC4C,
Usage Notes
PE15/TIOC4D/IRQOUT) also goes to the high impedance state at the same timing
Figure 10.117 Falling Edge Detection Operation
CK falling
Falling edge detected
High impedance state
Rev. 2.00, 09/04, page 315 of 720
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