PIC16LF1827-I/SO Microchip Technology, PIC16LF1827-I/SO Datasheet - Page 197
PIC16LF1827-I/SO
Manufacturer Part Number
PIC16LF1827-I/SO
Description
IC MCU 8BIT 4KB FLASH 18SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1827-I/SO
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
15
Number Of Timers
5
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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22.5
The signal provided from any selected input source for
the carrier high and carrier low signals can be inverted.
Inverting the signal for the carrier high source is
enabled by setting the MDCHPOL bit of the MDCARH
register. Inverting the signal for the carrier low source is
enabled by setting the MDCLPOL bit of the MDCARL
register.
22.6
Some peripherals assert control over their correspond-
ing output pin when they are enabled. For example,
when the CCP1 module is enabled, the output of CCP1
is connected to the CCP1 pin.
This default connection to a pin can be disabled by set-
ting the MDCHODIS bit in the MDCARH register for the
carrier high source and the MDCLODIS bit in the
MDCARL register for the carrier low source.
22.7
The MDBIT of the MDCON register can be selected as
the source for the modulator signal. This gives the user
the ability to program the value used for modulation.
22.8
The modulator source default connection to a pin can
be disabled by setting the MDMSODIS bit in the
MDSRC register.
22.9
The modulated output signal provided on the MDOUT
pin can also be inverted. Inverting the modulated out-
put signal is enabled by setting the MDOPOL bit of the
MDCON register.
22.10 SLEW RATE CONTROL
When modulated data streams of 20 MHz or greater
are required, the slew rate limitation on the output port
pin can be disabled. The slew rate limitation can be
removed by clearing the MDSLR bit in the MDCON
register.
22.11 OPERATION IN SLEEP MODE
The DSM module is not affected by Sleep mode. The
DSM can still operate during Sleep, if the Carrier and
Modulator input sources are also still operable during
Sleep.
© 2009 Microchip Technology Inc.
CARRIER SOURCE POLARITY
SELECT
CARRIER SOURCE PIN DISABLE
PROGRAMMABLE MODULATOR
DATA
MODULATOR SOURCE PIN
DISABLE
MODULATED OUTPUT POLARITY
Preliminary
22.12 Effects of a Reset
Upon any device Reset, the data signal modulator
module is disabled. The user’s firmware is responsible
for initializing the module before enabling the output.
The registers are reset to their default values.
PIC16F/LF1826/27
DS41391B-page 197
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