PIC16LF1827-I/SO Microchip Technology, PIC16LF1827-I/SO Datasheet - Page 330

• Manufacturer Part Number: PIC16LF1827-I/SO
• Description: IC MCU 8BIT 4KB FLASH 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1827-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 18-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• On-chip Dac: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F/LF1826/27
DECFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Description:
INCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS41391B-page 330
Decrement f, Skip if 0
[ label ] DECFSZ f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(f) - 1 → (destination);
skip if result = 0
None
The contents of register ‘f’ are decre-
mented. If ‘d’ is ‘0’, the result is placed
in the W register. If ‘d’ is ‘1’, the result
is placed back in register ‘f’.
If the result is ‘1’, the next instruction is
executed. If the result is ‘0’, then a
NOP is executed instead, making it a
2-cycle instruction.
Unconditional Branch
[ label ]
0 ≤ k ≤ 2047
k → PC<10:0>
PCLATH<4:3> → PC<12:11>
None
GOTO is an unconditional branch. The
eleven-bit immediate value is loaded
into PC bits <10:0>. The upper bits of
PC are loaded from PCLATH<4:3>.
GOTO is a two-cycle instruction.
Increment f
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
(f) + 1 → (destination)
Z
The contents of register ‘f’ are incre-
mented. If ‘d’ is ‘0’, the result is placed
in the W register. If ‘d’ is ‘1’, the result
is placed back in register ‘f’.
GOTO k
INCF f,d
Preliminary
INCFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Increment f, Skip if 0
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
(f) + 1 → (destination),
None
The contents of register ‘f’ are incre-
mented. If ‘d’ is ‘0’, the result is placed
in the W register. If ‘d’ is ‘1’, the result
is placed back in register ‘f’.
If the result is ‘1’, the next instruction is
executed. If the result is ‘0’, a NOP is
executed instead, making it a 2-cycle
instruction.
Inclusive OR W with f
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
(W) .OR. (f) → (destination)
Z
Inclusive OR the W register with regis-
ter ‘f’. If ‘d’ is ‘0’, the result is placed in
the W register. If ‘d’ is ‘1’, the result is
placed back in register ‘f’.
skip if result = 0
Inclusive OR literal with W
[ label ]
0 ≤ k ≤ 255
(W) .OR. k → (W)
Z
The contents of the W register are
OR’ed with the eight-bit literal ‘k’. The
result is placed in the W register.
© 2009 Microchip Technology Inc.
INCFSZ f,d
IORWF
IORLW k
f,d