PIC16F688-I/ML Microchip Technology, PIC16F688-I/ML Datasheet - Page 107
![IC PIC MCU FLASH 4KX14 16QFN](/photos/6/65/66536/mfg_mcp7386x_qfn_sml.jpg)
PIC16F688-I/ML
Manufacturer Part Number
PIC16F688-I/ML
Description
IC PIC MCU FLASH 4KX14 16QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(204 pages)
3.PIC16F688T-ISL.pdf
(6 pages)
4.PIC16F688T-ISL.pdf
(4 pages)
5.PIC16F688T-ISL.pdf
(688 pages)
6.PIC16F688-IML.pdf
(202 pages)
Specifications of PIC16F688-I/ML
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
16-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART/RS- 232/SCI/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F688T-ISL PDF datasheet #3
- PIC16F688T-ISL PDF datasheet #4
- PIC16F688T-ISL PDF datasheet #5
- PIC16F688-IML PDF datasheet #6
- Current page: 107 of 688
- Download datasheet (3Mb)
1997 Microchip Technology Inc.
Figure 6-8: Indirect Addressing
Example 6-2
minimum number of instructions. A similar concept could be used to move a defined number of
bytes (block) of data to the USART transmit register (TXREG). The starting address of the block
of data to be transmitted could easily be modified by the program.
Example 6-2: Indirect Addressing
NEXT
CONTINUE
7Fh
00h
Section 6. Memory Organization
BCF
MOVLW
MOVWF
CLRF
INCF
BTFSS
GOTO
:
shows a simple use of indirect addressing to clear RAM (locations 20h-2Fh) in a
Bank0
00
STATUS, IRP
0x20
FSR
INDF
FSR,F
FSR,4
NEXT
Bank1
01
Bank2
10
; Indirect addressing Bank0/1
; Initialize pointer to RAM
;
; Clear INDF register
; Inc pointer
; All done?
; NO, clear next
;
; YES, continue
Bank3
11
IRP
bank select
00h
7Fh
Data
Memory
7
Indirect Addressing
FSR register
DS31006A-page 6-13
location select
0
6
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