ATMEGA8535-16MU Atmel, ATMEGA8535-16MU Datasheet - Page 60

• Manufacturer Part Number: ATMEGA8535-16MU
• Description: IC AVR MCU 8K 16MHZ 5V 44-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8535-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VQFN Exposed Pad
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 44MLF EP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Alternate Functions Of Port B
60
ATmega8535(L)
Table 25. Overriding Signals for Alternate Functions in PA3..PA0
The Port B pins with alternate functions are shown in Table 26.
Table 26. Port B Pins Alternate Functions
The alternate pin configuration is as follows:
• SCK – Port B, Bit 7
SCK: Master Clock output, Slave Clock input pin for SPI channel. When the SPI is
enabled as a Slave, this pin is configured as an input regardless of the setting of DDB7.
When the SPI is enabled as a Master, the data direction of this pin is controlled by
DDB7. When the pin is forced by the SPI to be an input, the pull-up can still be con-
trolled by the PORTB7 bit.
• MISO – Port B, Bit 6
MISO: Master Data input, Slave Data output pin for SPI channel. When the SPI is
enabled as a Master, this pin is configured as an input regardless of the setting of
DDB6. When the SPI is enabled as a Slave, the data direction of this pin is controlled by
DDB6. When the pin is forced by the SPI to be an input, the pull-up can still be con-
trolled by the PORTB6 bit.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Port Pin
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
Alternate Functions
SCK (SPI Bus Serial Clock)
MISO (SPI Bus Master Input/Slave Output)
MOSI (SPI Bus Master Output/Slave Input)
SS (SPI Slave Select Input)
AIN1 (Analog Comparator Negative Input)
OC0 (Timer/Counter0 Output Compare Match Output)
AIN0 (Analog Comparator Positive Input)
INT2 (External Interrupt 2 Input)
T1 (Timer/Counter1 External Counter Input)
T0 (Timer/Counter0 External Counter Input)
XCK (USART External Clock Input/Output)
PA3/ADC3
0
0
0
0
0
0
0
0
–
ADC3 INPUT
PA2/ADC2
0
0
0
0
0
0
0
0
–
ADC2 INPUT
PA1/ADC1
0
0
0
0
0
0
0
0
–
ADC1 INPUT
PA0/ADC0
0
0
0
0
0
0
0
0
–
ADC0 INPUT
2502K–AVR–10/06