ATTINY2313-20SU Atmel, ATTINY2313-20SU Datasheet - Page 163

• Manufacturer Part Number: ATTINY2313-20SU
• Description: IC MCU AVR 2K FLASH 20SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY2313-20SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Cpu Family: ATtiny
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: SPI/USART/USI
• Total Internal Ram Size: 128Byte
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: SOIC
• Package: 20SOIC
• Family Name: ATtiny
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Processor Series: ATTINY2x
• Core: AVR8
• Data Ram Size: 128 B
• Maximum Clock Frequency: 20 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 128 B
• Height: 2.35 mm
• Length: 13 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7.6 mm
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Serial
Programming Pin
Mapping
Parallel
Programming
Enter Programming
Mode
Considerations for
Efficient Programming
Chip Erase
2543L–AVR–08/10
Table 75. Pin Mapping Serial Programming
The following algorithm puts the device in Parallel programming mode:
1. Set Prog_enable pins listed in
2. Apply 4.5 - 5.5V between V
3. Ensure that V
4. Wait 20 - 60 µs, and apply 11.5 - 12.5V to RESET.
5. Keep the Prog_enable pins unchanged for at least 10µs after the High-voltage has been
6. Wait at least 300 µs before giving any parallel programming commands.
7. Exit Programming mode by power the device down or by bringing RESET pin to 0V.
If the rise time of the V
tive algorithm can be used.
1. Set Prog_enable pins listed in
2. Apply 4.5 - 5.5V between V
3. Monitor V
4. Keep the Prog_enable pins unchanged for at least 10µs after the High-voltage has been
5. Wait until V
6. Exit Programming mode by power the device down or by bringing RESET pin to 0V.
The loaded command and address are retained in the device during programming. For efficient
programming, the following should be considered.
•
•
•
The Chip Erase will erase the Flash and EEPROM
not reset until the program memory has been completely erased. The Fuse bits are not
changed. A Chip Erase must be performed before the Flash and/or EEPROM are
reprogrammed.
Note:
0V.
applied to ensure the Prog_enable Signature has been latched.
to 0V.
applied to ensure the Prog_enable Signature has been latched.
commands.
The command needs only be loaded once when writing or reading multiple memory
locations.
Skip writing the data value 0xFF, that is the contents of the entire EEPROM (unless the
EESAVE Fuse is programmed) and Flash after a Chip Erase.
Address high byte needs only be loaded before programming or reading a new 256 word
window in Flash or 256 byte EEPROM. This consideration also applies to Signature bytes
reading.
Symbol
1. The EEPRPOM memory is preserved during Chip Erase if the EESAVE Fuse is programmed.
MOSI
MISO
SCK
CC
, and as soon as V
CC
CC
actually reaches 4.5 -5.5V before giving any parallel programming
reaches at least 1.8V within the next 20 µs.
CC
is unable to fulfill the requirements listed above, the following alterna-
Pins
PB5
PB6
PB7
CC
CC
and GND.
Table 72 on page 162
and GND.
CC
Table 72 on page 162
reaches 0.9 - 1.1V, apply 11.5 - 12.5V to RESET.
(1)
memories plus Lock bits. The Lock bits are
I/O
O
I
I
to “0000”, RESET pin to 0V and V
to “0000”, RESET pin and V
Serial Data out
Serial Data in
Description
Serial Clock
CC
CC
to
163