ATTINY2313-20SU Atmel, ATTINY2313-20SU Datasheet - Page 220

• Manufacturer Part Number: ATTINY2313-20SU
• Description: IC MCU AVR 2K FLASH 20SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY2313-20SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Cpu Family: ATtiny
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: SPI/USART/USI
• Total Internal Ram Size: 128Byte
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: SOIC
• Package: 20SOIC
• Family Name: ATtiny
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Processor Series: ATTINY2x
• Core: AVR8
• Data Ram Size: 128 B
• Maximum Clock Frequency: 20 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 128 B
• Height: 2.35 mm
• Length: 13 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7.6 mm
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Datasheet
Revision
History
Rev. 2543L - 8/10
Rev. 2543K - 03/10
Rev. 2543J - 11/09
Changes from Rev.
2543H-02/05 to
Rev. 2543I-04/06
Changes from Rev.
2543G-10/04 to
Rev. 2543H-02/05
220
ATtiny2313
Please note that the referring page numbers in this section refer to the complete document.
Added tape and reel part numbers in
“Not recommended for new design” from cover page. Fixed literature number mismatch
in Datasheet Revision History.
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Updated
Changed occurences of OCnA to OCFnA, OCnB to OCFnB and OC1x to
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Changed CKSEL default value in
Updated template
Changed device status to “Not recommended for new designs.”
Updated
Updated Table
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Updated typos.
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Table 19 on page
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OCF1x.
and
8 MHz.
Table 80 on page
“Resources” on page
“Stack Pointer” on page
“Calibration Byte” on page 160
Figure 1 on page
“Default Clock Source” on page
“128 kHz Internal Oscillator” on page
“Power Management and Sleep Modes” on page 30
“External Interrupts” on page
“Calibration Byte” on page
“DC Characteristics” on page
“Register Summary” on page
“Ordering Information” on page
Table 6 on page
Table 3 on page 23,Table 13 on page
“Bit 6 – ACBG: Analog Comparator Bandgap Select” on page
“Bit 7..0 – PCINT7..0: Pin Change Enable Mask 7..0” on page
“Sleep Mode Select” on page
42,
Table 31 on page
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“Ordering Information” on page
Table 15 on page
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“Default Clock Source” on page 23
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(to one byte of calibration data)
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“Errata” on page
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Table 68 on page 160
Table 14 on page
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2543L–AVR–08/10
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