PIC16F627A-I/SS Microchip Technology, PIC16F627A-I/SS Datasheet - Page 22
![IC MCU FLASH 1KX14 EEPROM 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F627A-I/SS
Manufacturer Part Number
PIC16F627A-I/SS
Description
IC MCU FLASH 1KX14 EEPROM 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F627A-IP.pdf
(180 pages)
3.PIC16F627A-IP.pdf
(8 pages)
4.PIC16F627A-IP.pdf
(22 pages)
5.PIC16F627A-ISO.pdf
(168 pages)
6.PIC16F648A-ISS.pdf
(178 pages)
Specifications of PIC16F627A-I/SS
Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
224 B
Interface Type
SCI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Package
20SSOP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPI3DBF648 - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPAC162053 - HEADER INTERFACE ICD,ICD2 18DIPAC164018 - MODULE SKT PROMATEII 20SSOP
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F627A-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F627A/628A/648A
TABLE 4-5:
DS40044B-page 20
Bank 2
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
110h
111h
112h
113h
114h
115h
116h
117h
118h
119h
11Ah
11Bh
11Ch
11Dh
11Eh
11Fh
Legend:
Note 1: For the Initialization Condition for Registers Tables, refer to Table 14-6 and Table 14-7.
Address
unimplemented.
— = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded =
INDF
TMR0
PCL
STATUS
FSR
PORTB
PCLATH
INTCON
Name
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SPECIAL FUNCTION REGISTERS SUMMARY BANK2
Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx
Timer0 module’s Register
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Bit 7
RB7
IRP
GIE
—
Bit 6
PEIE
RP1
RB6
—
Bit 5
T0IE
RP0
RB5
—
Preliminary
Bit 4
INTE
RB4
TO
Write buffer for upper 5 bits of program counter
Bit 3
RBIE
RB3
PD
Bit 2
T0IF
RB2
Z
Bit 1
INTF
RB1
DC
2004 Microchip Technology Inc.
Bit 0
RBIF
RB0
C
Value on
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxxx xxxx
---0 0000
0000 000x
Reset
POR
—
—
—
—
—
—
—
—
—
—
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—
—
—
—
—
—
—
—
—
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—
—
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