PIC16F627A-I/SS Microchip Technology, PIC16F627A-I/SS Datasheet - Page 66

• Manufacturer Part Number: PIC16F627A-I/SS
• Description: IC MCU FLASH 1KX14 EEPROM 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F627A-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Package: 20SSOP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPI3DBF648 - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPAC162053 - HEADER INTERFACE ICD,ICD2 18DIPAC164018 - MODULE SKT PROMATEII 20SSOP
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F627A/628A/648A
10.5
The comparator outputs are read through the CMCON
register. These bits are read only. The comparator
outputs may also be directly output to the RA3 and RA4
I/O pins. When the CM<2:0> = 110 or 001, multiplexors
in the output path of the RA3 and RA4/T0CK1 pins will
switch and the output of each pin will be the unsynchro-
nized output of the comparator. The uncertainty of each
of the comparators is related to the input offset voltage
and the response time given in the specifications.
Figure 10-3 shows the comparator output block
diagram.
The TRISA bits will still function as an output enable/
disable for the RA3 and RA4/T0CK1 pins while in this
mode.
FIGURE 10-3:
DS40044B-page 64
To RA3 or RA4/T0CK1 pin
Note 1: When reading the PORT register, all pins
Comparator Outputs
2: Analog levels on any pin that is defined as
CMCON<7:6>
configured as analog inputs will read as a
‘0’. Pins configured as digital inputs will
convert an analog input, according to the
Schmitt Trigger input specification.
Set CMIF bit
a digital input may cause the input buffer
to consume more current than is
specified.
To Data Bus
RD CMCON
CnI
NV
MODIFIED COMPARATOR OUTPUT BLOCK DIAGRAM
From other Comparator
Preliminary
Q
Q
EN
D
CL
EN
D
Reset
 2004 Microchip Technology Inc.
Q3
Q1
CnV
OUT