ATA6612P-PLQW Atmel, ATA6612P-PLQW Datasheet - Page 127
![MCU W/LIN TXRX REG WTCHDG 48-QFN](/photos/6/82/68297/48-qfn_sml.jpg)
ATA6612P-PLQW
Manufacturer Part Number
ATA6612P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6612-EK.pdf
(364 pages)
Specifications of ATA6612P-PLQW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATA6612P-PLQW
Manufacturer:
UPI
Quantity:
230
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9111H–AUTO–01/11
Table 6-49
correct PWM mode.
Table 6-49.
Note:
Table 6-50.
Notes:
• Bits 3, 2 – Res: Reserved Bits
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Mode
COM0B1
0
1
2
3
4
5
6
7
These bits are reserved bits in the Atmel
zero.
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the
counting sequence of the counter, the source for maximum (TOP) counter value, and what
type of waveform generation to be used (see
by the Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare Match
(CTC) mode, and two types of Pulse Width Modulation (PWM) modes (see
Operation” on page
0
0
1
1
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
2. BOTTOM = 0x00
1. MAX
WGM02
pare Match is ignored, but the set or clear is done at TOP. See
on page 121
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase
0
0
0
0
1
1
1
1
Compare Output Mode, Phase Correct PWM Mode
Waveform Generation Mode Bit Description
COM0B0
= 0xFF
0
1
0
1
WGM01
for more details.
118).
0
0
1
1
0
0
1
1
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
WGM00
0
1
0
1
0
1
0
1
Timer/Counter
Mode of
Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
Atmel ATA6612/ATA6613
®
ATA6612/ATA6613 and will always read as
Table
6-50). Modes of operation supported
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
–
–
(1)
“Phase Correct PWM Mode”
Update of
Immediate
Immediate
OCRx at
TOP
TOP
TOP
TOP
–
–
Set on
TOV Flag
BOTTOM
BOTTOM
“Modes of
MAX
MAX
MAX
TOP
–
–
(1)(2)
127
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