PIC16LF707-I/P Microchip Technology, PIC16LF707-I/P Datasheet - Page 100

• Manufacturer Part Number: PIC16LF707-I/P
• Description: MCU 8BIT 14KB FLASH 5.5V 40PDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF707-I/P

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 36
• Program Memory Type: FLASH
• Ram Size: 363 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC16LF
• No. Of I/o's: 36
• Ram Memory Size: 363Byte
• Cpu Speed: 20MHz
• No. Of Timers: 6
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: I2C, SPI, AUSART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 14 Channel
• On-chip Dac: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16F707/PIC16LF707
FIGURE 13-1:
TABLE 13-1:
DS41418A-page 100
From WDT
Overflow
From Timer2
Measurement
TxG
From TimerA/B
Note 1: ST Buffer is high speed type when using TxCKI.
Match PR2
Overflow
T1OSO/T1CKI
TxGSS<1:0>
Period
Timer1
Timer3
2: Timer1/3 register increments on rising edge.
3: Synchronize does not operate while in Sleep.
4: Timer1 gate source is TimerA. Timer3 gate source is TimerB. Refer to Table 13-1.
5: Timer1 clock source is CPSAOSC. Timer3 clock source is CPSBOSC. Refer to Table 13-1.
6: Timer3 does not have a T3OSC circuit. There is no T3OSCEN bit. Timer3 can operate from T1OSC.
T1OSCEN
(4)
T1OSI
TxCKI
Set flag bit
TMRxIF on
Overflow
TxGPOL
CPSOSC/TIMER
ASSOCIATION
Cap Sense
Oscillator
00
10
11
01
TIMER1/TIMER3 BLOCK DIAGRAM
CPS A
CPS B
TxGTM
T1OSC
TMRxH
EN
OUT
(6)
TMRx
(1)
TxG_IN
(Gate Source)
Divider Timer
(2)
TimerA
TimerB
D
R
CK
TMRxL
Q
Q
1
0
TMRxCS<1:0>
Cap. Sense
Oscillator A/B
Preliminary
Internal
Internal
F
Clock
Clock
F
OSC
0
1
OSC
TxGGO/DONE
Q
/4
(5)
EN
D
Single Pulse
Acq. Control
11
10
00
00
TxCLK
TxGSPM
TxCKPS<1:0>
TxSYNC
Prescaler
1, 2, 4, 8
TMRxON
0
1
2
0
1
Internal
F
Clock
OSC
TxGVAL
TMRxGE
 2010 Microchip Technology Inc.
/2
Q1
Synchronized
Synchronize
Interrupt
clock input
D
EN
det
det
Sleep input
Q
(3)
Set
TMRxGIF
Data Bus
TXGCON
RD