PIC16LF707-I/P Microchip Technology, PIC16LF707-I/P Datasheet - Page 144

• Manufacturer Part Number: PIC16LF707-I/P
• Description: MCU 8BIT 14KB FLASH 5.5V 40PDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF707-I/P

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 36
• Program Memory Type: FLASH
• Ram Size: 363 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC16LF
• No. Of I/o's: 36
• Ram Memory Size: 363Byte
• Cpu Speed: 20MHz
• No. Of Timers: 6
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: I2C, SPI, AUSART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 14 Channel
• On-chip Dac: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16F707/PIC16LF707
FIGURE 18-5:
TABLE 18-2:
DS41418A-page 144
ANSELC
INTCON
PIE1
PIR1
RCREG
RCSTA
SPBRG
TRISC
TXSTA
Legend:
Name
Note:
RX/DT pin
Rcv Shift
Reg
Rcv Buffer Reg
Read Rcv
Buffer Reg
RCREG
RCIF
(Interrupt Flag)
OERR bit
CREN
x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used for asynchronous reception.
TMR1GIE
TMR1GIF
TRISC7
ANSC7
SPEN
BRG7
CSRC
This timing diagram shows three words appearing on the RX input. The RCREG (receive buffer) is read after the third word,
causing the OERR (overrun) bit to be set.
Bit 7
GIE
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Start
ASYNCHRONOUS RECEPTION
bit
TRISC6
ANSC6
BRG6
ADIE
Bit 6
PEIE
ADIF
RX9
TX9
bit 0
bit 1
TMR0IE
TRISC5
ANSC5
SREN
BRG5
TXEN
RCIE
RCIF
Bit 5
AUSART Receive Data Register
TRISC4
CREN
SYNC
BRG4
Bit 4
INTE
TXIE
TXIF
bit 7/8
—
Preliminary
Stop
bit
TRISC3
ADDEN
SSPIE
SSPIF
BRG3
RBIE
Bit 3
Word 1
RCREG
—
—
Start
bit
bit 0
TMR0IF
CCP1IE
CCP1IF
TRISC2
ANSC2
BRGH
FERR
BRG2
Bit 2
TMR2IE
TMR2IF
TRISC1
ANSC1
OERR
BRG1
TRMT
bit 7/8 Stop
INTF
Bit 1
Word 2
RCREG
bit
TMR1IE
TMR1IF
TRISC0
ANSC0
RX9D
BRG0
TX9D
RBIF
Bit 0
Start
 2010 Microchip Technology Inc.
bit
111- -111
0000 000x
0000 0000
0000 0000
0000 0000
0000 000x
0000 0000
1111 1111
0000 -010
POR, BOR
Value on
bit 7/8
Stop
111- -111
0000 000x
0000 0000
0000 0000
0000 0000
0000 000x
0000 0000
1111 1111
0000 -010
bit
Value on
all other
Resets