ATXMEGA32A4-CUR Atmel, ATXMEGA32A4-CUR Datasheet - Page 168

MCU AVR 32+4 FLASH 49VFBGA

ATXMEGA32A4-CUR

Manufacturer Part Number
ATXMEGA32A4-CUR
Description
MCU AVR 32+4 FLASH 49VFBGA
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheets

Specifications of ATXMEGA32A4-CUR

Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
49-VFBGA
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATXMEGA32A4-CUR
Manufacturer:
Atmel
Quantity:
10 000
14.12.5
14.12.6
8077H–AVR–12/09
CTRLE - Control Register E
INTCTRLA - Interrupt Enable Register A
Table 14-6.
• Bit 7:1 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 0 - BYTEM: Byte Mode:
Enabling the Byte Mode, sets the Timer/Counter in Byte (8-bit) Mode. Setting this bit will disable
the update of the temporary register (TEMP) when any of the 16-bit Timer/Counter registers are
accessed. In addition the upper byte of the counter (CNT) register will be set to zero after each
counter clock.
• Bit 7:4 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
Bit
+0x04
Read/Write
Initial Value
Bit
+0x06
Read/Write
Initial Value
EVSEL[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1xxx
Timer Event Source Selection
7
R
0
R
-
7
0
-
Group Configuration
R
6
0
-
R
6
0
-
OFF
CHn
R
5
0
R
-
5
0
-
Event Source
None
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Event channel n, n={0,...,7}
R
4
0
R
-
4
0
-
R/W
3
R
0
-
3
ERRINTLVL[1:0]
0
R/W
R
2
0
-
2
0
R/W
R
1
0
1
OVFINTLVL[1:0]
0
-
XMEGA A
BYTEM
R/W
R/W
0
0
0
0
INTCTRLA
CTRLE
168

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