PIC18F6490-E/PT Microchip Technology, PIC18F6490-E/PT Datasheet - Page 150

• Manufacturer Part Number: PIC18F6490-E/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6490-E/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• For Use With: DM163028 - BOARD DEMO PICDEM LCD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

PIC18F6390/6490/8390/8490
14.1
Each Capture/Compare/PWM module is associated
with a control register (generically, CCPxCON) and a
data register (CCPRx). The data register in turn is com-
prised of two 8-bit registers: CCPRxL (low byte) and
CCPRxH (high byte). All registers are both readable
and writable.
14.1.1
The CCP modules utilize Timers 1, 2 or 3, depending
on the mode selected. Timer1 and Timer3 are available
to modules in Capture or Compare modes, while
Timer2 is available for modules in PWM mode.
TABLE 14-1:
FIGURE 14-1:
DS39629C-page 148
Timer1 is used for all capture
and compare operations for
all CCP modules. Timer2 is
used for PWM operations for
all CCP modules. Modules
may
resource as a common time
base.
TMR1
TMR2
T3CCP<2:1> = 00
CCP Mode
CCP1
CCP2
Compare
share
Capture
CCP Module Configuration
PWM
CCP MODULES AND TIMER
RESOURCES
either
CCP MODE – TIMER
RESOURCE
TMR3
CCP AND TIMER INTERCONNECT CONFIGURATIONS
timer
Timer1 or Timer3
Timer1 or Timer3
Timer Resource
Timer2
Timer1 is used for capture
and compare operations for
CCP1 and Timer 3 is used for
CCP2.
Both the modules use Timer2
as a common time base if they
are in PWM modes.
TMR1
T3CCP<2:1> = 01
CCP1
TMR2
TMR3
CCP2
The assignment of a particular timer to a module is
determined by the Timer to CCP enable bits in the
T3CON register (Register 13-1). Both modules may be
active at any given time and may share the same timer
resource if they are configured to operate in the same
mode (capture/compare or PWM) at the same time.
The interactions between the two modules are
summarized in Table 14-2.
Depending on the configuration selected, up to four
timers may be active at once, with modules in the same
configuration (capture/compare or PWM) sharing timer
resources. The possible configurations are shown in
Figure 14-1.
14.1.2
The pin assignment for CCP2 (capture input, compare
and PWM output) can change based on device config-
uration. The CCP2MX Configuration bit determines
which pin CCP2 is multiplexed to. By default, it is
assigned to RC1 (CCP2MX = 1). If the Configuration bit
is cleared, CCP2 is multiplexed with RE7.
Changing the pin assignment of CCP2 does not
automatically change any requirements for configuring
the port pin. Users must always verify that the appropri-
ate TRIS register is configured correctly for CCP2
operation, regardless of where it is located.
CCP2 PIN ASSIGNMENT
© 2007 Microchip Technology Inc.
Timer3 is used for all capture
and compare operations for
all CCP modules. Timer2 is
used for PWM operations for
all CCP modules. Modules
may
resource as a common time
base.
TMR1
T3CCP<2:1> = 1x
share
either
TMR3
TMR2
CCP1
CCP2
timer