PIC18F6490-E/PT Microchip Technology, PIC18F6490-E/PT Datasheet - Page 289
![IC PIC MCU FLASH 16KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F6490-E/PT
Manufacturer Part Number
PIC18F6490-E/PT
Description
IC PIC MCU FLASH 16KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F6310-IPT.pdf
(28 pages)
3.PIC18F6390-IPT.pdf
(414 pages)
4.PIC18F6390-IPT.pdf
(16 pages)
5.PIC18F6390-IPT.pdf
(12 pages)
6.PIC18F6390-IPT.pdf
(6 pages)
7.PIC18F6390-IPT.pdf
(4 pages)
Specifications of PIC18F6490-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
For Use With
DM163028 - BOARD DEMO PICDEM LCD
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F6490-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F6310-IPT PDF datasheet #2
- PIC18F6390-IPT PDF datasheet #3
- PIC18F6390-IPT PDF datasheet #4
- PIC18F6390-IPT PDF datasheet #5
- PIC18F6390-IPT PDF datasheet #6
- PIC18F6390-IPT PDF datasheet #7
- Current page: 289 of 414
- Download datasheet (7Mb)
23.2
For PIC18F6390/6490/8390/8490 devices, the WDT is
driven by the INTRC source. When the WDT is
enabled, the clock source is also enabled. The nominal
WDT period is 4 ms and has the same stability as the
INTRC oscillator.
The 4 ms period of the WDT is multiplied by a 16-bit
postscaler. Any output of the WDT postscaler is
selected by a multiplexer, controlled by bits in Configu-
ration Register 2H. Available periods range from 4 ms
to 134.2 seconds (2.24 minutes). The WDT and
postscaler are cleared when any of the following events
occur: a SLEEP or CLRWDT instruction is executed, the
IRCF bits (OSCCON<6:4>) are changed, or a clock
failure has occurred.
FIGURE 23-1:
© 2007 Microchip Technology Inc.
Change on IRCF bits
All Device Resets
INTRC Source
WDTPS<3:0>
Watchdog Timer (WDT)
SWDTEN
WDTEN
CLRWDT
Sleep
WDT BLOCK DIAGRAM
Enable WDT
WDT Counter
÷128
PIC18F6390/6490/8390/8490
INTRC Control
4
Programmable Postscaler
1:1 to 1:32,768
23.2.1
Register 23-9 shows the WDTCON register. This is a
readable and writable register, which contains a control
bit that allows software to override the WDT enable
Configuration bit, but only if the Configuration bit has
disabled the WDT.
Note 1: The CLRWDT and SLEEP instructions
2: Changing the setting of the IRCF bits
3: When a CLRWDT instruction is executed,
WDT
CONTROL REGISTER
clear the WDT and postscaler counts
when executed.
(OSCCON<6:4>) clears the WDT and
postscaler counts.
the postscaler count will be cleared.
Reset
DS39629C-page 287
Wake-up from
Power-Managed
Modes
WDT
Reset
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