ATMEGA32U2-MU Atmel, ATMEGA32U2-MU Datasheet - Page 213
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
ATMEGA32U2-MU
Manufacturer Part Number
ATMEGA32U2-MU
Description
MCU AVR USB 32K FLASH IND 32VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32U2-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2.5 KB
Interface Type
SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
22
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
- Current page: 213 of 309
- Download datasheet (6Mb)
21.18.5
21.18.6
21.18.7
7799D–AVR–11/10
UDFNUMH – USB Device Frame Number High Register
UDFNUML – USB Device Frame Number Low Register
UDMFN – USB Device Micro Frame Number
• Bits 7:3 – Res: Reserved
These bits are reserved and will always read as zero.
• Bits 2:0 – FNUM[10:8]: Frame Number Upper Flag
These bits are read-only and updated by the hardware USB controller. These bits contains the 3
MSB of the 11-bits Frame Number information. The content of these bits is updated with the last
received SOF packet. These bits are updated even if a corrupted SOF has been received. When
a corrupted SOF number is detected, the FNCERR bit of UDMFN is set.
• Bits 7:0 – FNUM: Frame Number Lower Flag
These bits are read-only and updated by the hardware USB controller. These bits contains the 8
LSB of the 11-bits Frame Number information. The content of these bits is updated with the last
received SOF packet. These bits are updated even if a corrupted SOF has been received. When
a corrupted SOF number is detected, the FNCERR bit of UDMFN is set.
• Bit 7:5 – Res: Reserved
These bits are reserved and will always read as zero.
• Bit 4 – FNCERR: Frame Number CRC Error Flag
This bit is set by the USB controller when a corrupted frame number in Start of frame packet is
received. When an incorrect frame number is detected both SOFI flag and this bit are set.
• Bits 3:0 – Res: Reserved
These bits are reserved and will always read as zero.
Bit
(0xE5)
Read/Write
Initial Value
Bit
(0xE4)
Read/Write
Initial Value
Bit
(0xE6)
Read/Write
Initial Value
R
7
0
-
R
7
0
R
7
0
-
R
6
0
-
R
R
6
0
6
0
-
R
R
5
0
5
0
-
R
5
0
-
FNCERR
R/W
R
4
0
-
R
4
0
4
0
FNUM[7:0]
ATmega8U2/16U2/32U2
R
3
0
R
-
R
3
0
3
0
-
R
2
0
R
R
2
0
2
0
-
FNUM[10:8]
R
R
R
1
0
1
0
1
0
-
R
R
R
0
0
0
0
0
0
-
UDFNUMH
UDFNUML
UDMFN
213
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