ATMEGA8HVA-4TU Atmel, ATMEGA8HVA-4TU Datasheet - Page 81
![MCU AVR 8K FLASH 4MHZ 28-TSOP](/photos/7/21/72191/313-28-tsop_sml.jpg)
ATMEGA8HVA-4TU
Manufacturer Part Number
ATMEGA8HVA-4TU
Description
MCU AVR 8K FLASH 4MHZ 28-TSOP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16HVA-4CKU.pdf
(196 pages)
Specifications of ATMEGA8HVA-4TU
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
7
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 9 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 85°C
Package / Case
28-TSOP
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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17.5.3
17.5.4
8024A–AVR–04/08
16-bit Mode
Clear Timer on Compare Match (CTC) 16-bit Mode
Figure 17-3. CTC Mode, Timing Diagram
An interrupt can be generated each time the counter value reaches the TOP value by using the
OCFnA Flag. If the interrupt is enabled, the interrupt handler routine can be used for updating
the TOP value. However, changing TOP to a value close to BOTTOM when the counter is run-
ning with none or a low prescaler value must be done with care. If the new value written to
OCRnA is lower than the current value of TCNTn, the counter will miss the Compare Match. The
counter will then have to count to its maximum value (0xFF) and wrap around starting at 0x00
before the Compare Match can occur. As for the Normal mode of operation, the TOVn Flag is
set in the same timer clock cycle that the counter counts from MAX to 0x00.
In 16-bit mode, the counter (TCNTnH/L) is a incrementing until it overruns when it passes its
maximum 16-bit value (MAX = 0xFFFF) and then restarts from the bottom (0x0000), see
17-2 on page 80
cycle as the TCNTnH/L becomes zero. The TOVn Flag in this case behaves like a 17th bit,
except that it is only set, not cleared. However, combined with the timer overflow interrupt that
automatically clears the TOVn Flag, the timer resolution can be increased by software. There
are no special cases to consider in the Normal mode, a new counter value can be written any-
time. The Output Compare Unit can be used to generate interrupts at some given time.
In Clear Timer on Compare 16-bit mode, OCRnB/A Registers are used to manipulate the
counter resolution, see
cleared to zero when the counter value (TCNTn) matches OCRnB/A, where OCRnB represents
the eight most significant bits and OCRnA represents the eight least significant bits. OCRnB/A
defines the top value of the counter, hence also its resolution. This mode allows greater control
of the Compare Match output frequency. It also simplifies the operation of counting external
events.
An interrupt can be generated each time the counter reaches the TOP value by using the
OCFnA flag. If the interrupt is enabled, the interrupt handler routine can be used for updating the
TOP value. However, changing the TOP to a value close the BOTTOM when the counter is run-
ning with none or a low prescaler value must be done with care since the CTC mode does not
have the double buffering feature. If the new value written to OCRnB/A is lower than the current
value of TCNTn, the counter will miss the Compare Match. The counter will then have to count to
its maximum value (0xFFFF) and wrap around starting at 0x0000 before Compare Match can
occur. As for the 16-bit Mode, the TOVn Flag is set in the same timer clock cycle that the counter
counts from MAX to 0x0000.
TCNTn
Period
for bit settings. The Overflow Flag (TOVn) will be set in the same timer clock
1
Table 17-2 on page 80
2
3
for bit settings. In CTC mode the counter is
4
ATmega8HVA/16HVA
OCnx Interrupt Flag Set
Table
81
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