PIC18LF8620T-I/PT Microchip Technology, PIC18LF8620T-I/PT Datasheet - Page 159

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PIC18LF8620T-I/PT

Manufacturer Part Number
PIC18LF8620T-I/PT
Description
IC MCU FLASH 32KX16 LV 80-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF8620T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Core
PIC
Processor Series
PIC18LF
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
3840 B
Data Rom Size
1024 B
On-chip Adc
16 bit
Number Of Programmable I/os
68
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Mounting Style
SMD/SMT
Height
1 mm
Interface Type
I2C, SPI, USART
Length
12 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V, 5.8 V
Supply Voltage (min)
3.9 V, 4.2 V
Width
12 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF8620T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
17.0
17.1
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
The I
hardware:
• Master mode
• Multi-Master mode
• Slave mode
17.2
The MSSP module has three associated registers.
These include a status register (SSPSTAT) and two
control registers (SSPCON1 and SSPCON2). The use
of these registers and their individual configuration bits
differ significantly, depending on whether the MSSP
module is operated in SPI or I
Additional details are provided under the individual
sections.
 2004 Microchip Technology Inc.
- Full Master mode
- Slave mode (with general address call)
2
C interface supports the following modes in
MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
Master SSP (MSSP) Module
Overview
Control Registers
PIC18F6520/8520/6620/8620/6720/8720
2
C)
2
C mode.
17.3
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four modes
of SPI are supported. To accomplish communication,
typically three pins are used:
• Serial Data Out (SDO) – RC5/SDO
• Serial Data In (SDI) – RC4/SDI/SDA
• Serial Clock (SCK) – RC3/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RF7/SS
Figure 17-1 shows the block diagram of the MSSP
module when operating in SPI mode.
FIGURE 17-1:
RC4/SDI/SDA
RC3/SCK/
RC5/SDO
RF7/SS
SCL
SPI Mode
Read
SS Control
Select
SMP:CKE
Edge
MSSP BLOCK DIAGRAM
(SPI MODE)
Enable
bit0
Select
Edge
TRIS bit
Data to TX/RX in SSPSR
SSPBUF reg
2
SSPM3:SSPM0
SSPSR reg
Clock Select
4
2
DS39609B-page 157
(
Prescaler
4, 16, 64
TMR2 Output
Write
Clock
Shift
Data Bus
Internal
2
T
OSC
)

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