PIC18LF8620T-I/PT Microchip Technology, PIC18LF8620T-I/PT Datasheet - Page 92

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PIC18LF8620T-I/PT

Manufacturer Part Number
PIC18LF8620T-I/PT
Description
IC MCU FLASH 32KX16 LV 80-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF8620T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Core
PIC
Processor Series
PIC18LF
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
3840 B
Data Rom Size
1024 B
On-chip Adc
16 bit
Number Of Programmable I/os
68
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Mounting Style
SMD/SMT
Height
1 mm
Interface Type
I2C, SPI, USART
Length
12 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V, 5.8 V
Supply Voltage (min)
3.9 V, 4.2 V
Width
12 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF8620T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F6520/8520/6620/8620/6720/8720
REGISTER 9-2:
DS39609B-page 90
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTCON2 REGISTER
bit 7
RBPU: PORTB Pull-up Enable bit
1 = All PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG0: External Interrupt 0 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG1: External Interrupt 1 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG2: External Interrupt 2 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG3: External Interrupt 3 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
TMR0IP: TMR0 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
INT3IP: INT3 External Interrupt Priority bit
1 = High priority
0 = Low priority
RBIP: RB Port Change Interrupt Priority bit
1 = High priority
0 = Low priority
Legend:
R = Readable bit
- n = Value at POR
Note:
R/W-1
RBPU
Interrupt flag bits are set when an interrupt condition occurs, regardless of the state
of its corresponding enable bit or the global enable bit. User software should ensure
the appropriate interrupt flag bits are clear prior to enabling an interrupt. This feature
allows for software polling.
INTEDG0
R/W-1
INTEDG1
R/W-1
W = Writable bit
‘1’ = Bit is set
INTEDG2
R/W-1
INTEDG3
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TMR0IP
R/W-1
 2004 Microchip Technology Inc.
x = Bit is unknown
INT3IP
R/W-1
R/W-1
RBIP
bit 0

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