PIC18LF8620T-I/PT Microchip Technology, PIC18LF8620T-I/PT Datasheet - Page 282

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PIC18LF8620T-I/PT

Manufacturer Part Number
PIC18LF8620T-I/PT
Description
IC MCU FLASH 32KX16 LV 80-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF8620T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Core
PIC
Processor Series
PIC18LF
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
3840 B
Data Rom Size
1024 B
On-chip Adc
16 bit
Number Of Programmable I/os
68
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Mounting Style
SMD/SMT
Height
1 mm
Interface Type
I2C, SPI, USART
Length
12 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V, 5.8 V
Supply Voltage (min)
3.9 V, 4.2 V
Width
12 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF8620T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F6520/8520/6620/8620/6720/8720
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (k<7:0>)
2nd word(k<19:8>)
Description:
Words:
Cycles:
Example:
DS39609B-page 280
Q Cycle Activity:
After Instruction
operation
Decode
PC =
No
Q1
Read literal
Address (THERE)
operation
Unconditional Branch
[ label ]
0
k
None
GOTO allows an unconditional
branch anywhere within the entire
2-Mbyte memory range. The 20-bit
value ‘k’ is loaded into PC<20:1>.
GOTO is always a two-cycle
instruction.
2
2
GOTO THERE
‘k’<7:0>
1110
1111
No
Q2
k
PC<20:1>
1048575
GOTO k
k
1111
19
operation
operation
kkk
No
No
Q3
k
kkkk
7
kkk
Read literal
Write to PC
’k’<19:8>,
operation
No
Q4
kkkk
kkkk
0
8
INCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
CNT
Z
C
DC
CNT
Z
C
DC
Q1
=
=
=
=
=
=
=
=
register ‘f’
Increment f
[ label ]
0
d
a
(f) + 1
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in W. If ‘d’ is ‘1’, the result
is placed back in register ‘f’
(default). If ‘a’ is ‘0’, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ = 1, then the
bank will be selected as per the
BSR value (default).
1
1
INCF
C, DC, N, OV, Z
Read
0010
Q2
0xFF
0
?
?
0x00
1
1
1
f
[0,1]
[0,1]
 2004 Microchip Technology Inc.
255
dest
INCF
10da
CNT, 1, 0
Process
Data
Q3
f [,d [,a]
ffff
destination
Write to
Q4
ffff

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