ATMEGA64L-8AU Atmel, ATMEGA64L-8AU Datasheet - Page 131
![IC AVR MCU 64K 8MHZ 3V 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA64L-8AU
Manufacturer Part Number
ATMEGA64L-8AU
Description
IC AVR MCU 64K 8MHZ 3V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64L-8AU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
JTAG/SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
8 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5/5.8V
Operating Supply Voltage (min)
2.4/2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA64L-8AU
Manufacturer:
ATMEL
Quantity:
4 000
Company:
Part Number:
ATMEGA64L-8AU
Manufacturer:
ATMEL
Quantity:
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Part Number:
ATMEGA64L-8AU
Manufacturer:
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Quantity:
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Timer/Counter
Timing Diagrams
2490Q–AVR–06/10
output will be continuously low and if set equal to TOP the output will be set to high for non-
inverted PWM mode. For inverted PWM the output will have the opposite logic values. If OCnA
is used to define the TOP value (WGMn3:0 = 9) and COMnA1:0 = 1, the OCnA output will toggle
with a 50% duty cycle.
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when interrupt
flags are set, and when the OCRnx Register is updated with the OCRnx buffer value (only for
modes utilizing double buffering).
Figure 55. Timer/Counter Timing Diagram, Setting of OCFnx, no Prescaling
Figure 56
Figure 56. Timer/Counter Timing Diagram, Setting of OCFnx, with Prescaler (f
Figure 57
frequency correct PWM mode the OCRnx Register is updated at BOTTOM. The timing diagrams
will be the same, but TOP should be replaced by BOTTOM, TOP-1 by BOTTOM+1 and so on.
The same renaming applies for modes that set the TOVn flag at BOTTOM.
TCNTn
OCRnx
OCFnx
TCNTn
OCRnx
OCFnx
(clk
(clk
clk
clk
clk
clk
I/O
I/O
I/O
I/O
Tn
Tn
/1)
/8)
shows the same timing data, but with the prescaler enabled.
shows the count sequence close to TOP in various modes. When using phase and
OCRnx - 1
OCRnx - 1
Figure 55
OCRnx
OCRnx
shows a timing diagram for the setting of OCFnx.
OCRnx Value
OCRnx Value
OCRnx + 1
OCRnx + 1
Tn
ATmega64(L)
) is therefore shown as a
OCRnx + 2
OCRnx + 2
clk_I/O
/8)
131
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