ATMEGA64L-8AU Atmel, ATMEGA64L-8AU Datasheet - Page 323

IC AVR MCU 64K 8MHZ 3V 64TQFP

ATMEGA64L-8AU

Manufacturer Part Number
ATMEGA64L-8AU
Description
IC AVR MCU 64K 8MHZ 3V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64L-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
JTAG/SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
8 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5/5.8V
Operating Supply Voltage (min)
2.4/2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Reading the Flash
Programming the
EEPROM
Reading the EEPROM
2490Q–AVR–06/10
1. Enter JTAG instruction PROG_COMMANDS.
2. Enable Flash read using programming instruction 3a.
3. Load address using programming instructions 3b and 3c.
4. Read data using programming instruction 3d.
5. Repeat steps 3 and 4 until all data have been read.
A more efficient data transfer can be achieved using the PROG_PAGEREAD instruction:
1. Enter JTAG instruction PROG_COMMANDS.
2. Enable Flash read using programming instruction 3a.
3. Load the page address using programming instructions 3b and 3c. PCWORD (refer to
4. Enter JTAG instruction PROG_PAGEREAD.
5. Read the entire page by shifting out all instruction words in the page, starting with the
6. Enter JTAG instruction PROG_COMMANDS.
7. Repeat steps 3 to 6 until all data have been read.
Before programming the EEPROM, a Chip Erase must be performed. See
Erase” on page
1. Enter JTAG instruction PROG_COMMANDS.
2. Enable EEPROM write using programming instruction 4a.
3. Load address high byte using programming instruction 4b.
4. Load address low byte using programming instruction 4c.
5. Load data using programming instructions 4d and 4e.
6. Repeat steps 4 and 5 for all data bytes in the page.
7. Write the data using programming instruction 4f.
8. Poll for EEPROM write complete using programming instruction 4g, or wait for t
9. Repeat steps 3 to 8 until all data have been programmed.
Note that the PROG_PAGELOAD instruction can not be used when programming the EEPROM.
1. Enter JTAG instruction PROG_COMMANDS.
2. Enable EEPROM read using programming instruction 5a.
3. Load address using programming instructions 5b and 5c.
4. Read data using programming instruction 5d.
5. Repeat steps 3 and 4 until all data have been read.
Note that the PROG_PAGEREAD instruction can not be used when reading the EEPROM
Table 123 on page
LSB of the first instruction in the page and ending with the MSB of the last instruction in
the page. Remember that the first eight bits shifted out should be ignored.
(refer to
Table 1 on page
321.
296) is used to address within one page and must be written as 0.
304).
ATmega64(L)
“Performing Chip
WLRH
323

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