ATMEGA64L-8AU Atmel, ATMEGA64L-8AU Datasheet - Page 383

• Manufacturer Part Number: ATMEGA64L-8AU
• Description: IC AVR MCU 64K 8MHZ 3V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64L-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Package: 64TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 53
• Interface Type: JTAG/SPI/TWI/USART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 4
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Cpu Family: ATmega
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 4KB
• # I/os (max): 53
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5/5.8V
• Operating Supply Voltage (min): 2.4/2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: TQFP
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 2KB
• Ram Memory Size: 4KB
• Cpu Speed: 8MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Changes from Rev.
2490F-12/03 to
Rev. 2490G-03/04
Changes from Rev.
2490E-09/03 to
Rev. 2490F-12/03
Changes from Rev.
2490D-02/03 to
Rev. 2490E-09/03
Changes from Rev.
2490C-09/02 to
Rev. 2490D-02/03
2490Q–AVR–06/10
1. Updated
1. Updated
1. Updated note in
2. Updated
3. Updated
4. Updated description for the JTD bit on
5. Added a note regarding JTAGEN fuse to
6. Updated R
7. Updated
8. Added a proposal for solving problems regarding the JTAG instruction IDCODE in
1. Added reference to
2. Added Chip Erase as a first step under
3. Corrected OCn waveforms in
4. Various minor Timer1 corrections.
5. Improved the description in
6. Various minor TWI corrections.
7. Added note under "Filling the Temporary Buffer (Page Loading)" about writing to the
8. Removed ADHSM completely.
9. Added note about masking out unused bits when reading the Program Counter in
10. Added section
11. Changed V
“Errata” on page
Programming to inform about the Flash page size.
“Programming the EEPROM” on page
153.
EEPROM during an SPM page load.
“Stack Pointer” on page
“Errata” on page
“Calibrated Internal RC Oscillator” on page
“JTAG Interface and On-chip Debug System” on page
“TAP – Test Access Port” on page 248
“ADC Characteristics” on page
PU
HYST
values in
“EEPROM Write During Power-down Sleep Mode” on page
value to 120 in
“XDIV – XTAL Divide Control Register” on page
379.
Table 124 on page 296
“DC Characteristics” on page
14.
379.
“Phase Correct PWM Mode” on page 101
Figure 52 on page
Table 19 on page
323.
page
332.
Table 118 on page
“Programming the Flash” on page 322
from both SPI Serial Programming and Self
258.
regarding JTAGEN.
126.
52.
43.
325.
292.
ATmega64(L)
50.
39.
and on
25.
page
and
383