ATMEGA64L-8AU Atmel, ATMEGA64L-8AU Datasheet - Page 292

IC AVR MCU 64K 8MHZ 3V 64TQFP

ATMEGA64L-8AU

Manufacturer Part Number
ATMEGA64L-8AU
Description
IC AVR MCU 64K 8MHZ 3V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64L-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
JTAG/SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
8 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5/5.8V
Operating Supply Voltage (min)
2.4/2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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2490Q–AVR–06/10
Table 118. Fuse High Byte
Notes:
Table 119. Fuse Low Byte
Notes:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
Fuse High Byte
OCDEN
JTAGEN
SPIEN
CKOPT
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
Fuse Low Byte
BODLEVEL
BODEN
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
(1)
1. The SPIEN Fuse is not accessible in SPI Serial Programming mode.
2. The CKOPT Fuse functionality depends on the setting of the CKSEL bits. See
3. The default value of BOOTSZ1..0 results in maximum Boot Size. See
4. If the JTAG interface is left unconnected, the JTAGEN fuse should if possible be disabled. This
1. The default value of SUT1..0 results in maximum start-up time. See
2. The default setting of CKSEL3..0 results in internal RC Oscillator @ 1 MHz. See
(2)
(4)
Sources” on page 38
to avoid static current at the TDO pin in the JTAG interface
details.
page 38
Bit no
Bit no
for details.
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Description
Brown out detector trigger
level
Brown out detector enable
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
Description
Enable OCD
Enable JTAG
Enable SPI Serial Program and
Data Downloading
Oscillator options
EEPROM memory is preserved
through the Chip Erase
for details)
for details)
Select Reset Vector
Select Boot Size (see
Select Boot Size (see
for details.
Table 112
Table 112
Default Value
1 (unprogrammed)
0 (programmed)
1 (unprogrammed)
1 (unprogrammed, BOD
disabled)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
Default Value
1 (unprogrammed, OCD
disabled)
0 (programmed, JTAG
enabled)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed,
EEPROM not preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
ATmega64(L)
(1)
(2)
(2)
(2)
(1)
(2)
Table 14 on page 43
Table 112 on page 289
(3)
(3)
Table 6 on
“Clock
292
for

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