ATMEGA64L-8AU Atmel, ATMEGA64L-8AU Datasheet - Page 193

• Manufacturer Part Number: ATMEGA64L-8AU
• Description: IC AVR MCU 64K 8MHZ 3V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64L-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Package: 64TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 53
• Interface Type: JTAG/SPI/TWI/USART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 4
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Cpu Family: ATmega
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 4KB
• # I/os (max): 53
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5/5.8V
• Operating Supply Voltage (min): 2.4/2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: TQFP
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 2KB
• Ram Memory Size: 4KB
• Cpu Speed: 8MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UBRRnL and UBRRnH
– USART Baud Rate
Registers
Examples of Baud
Rate Setting
2490Q–AVR–06/10
(1)
Note:
• Bit 15:12 – Reserved Bits
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRH is written.
• Bit 11:0 – UBRRn11:0: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRnH contains the four
most significant bits, and the UBRRnL contains the eight least significant bits of the USART
baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud
rate is changed. Writing UBRRnL will trigger an immediate update of the baud rate prescaler.
For standard crystal and resonator frequencies, the most commonly used baud rates for asyn-
chronous operation can be generated by using the UBRRn settings in
UBRRn values which yield an actual baud rate differing less than 0.5% from the target baud
rate, are bold in the table. Higher error ratings are acceptable, but the receiver will have less
noise resistance when the error ratings are high, especially for large serial frames (see
chronous Operational Range” on page
equation:
Bit
Read/Write
Initial Value
1. UBRRH is not available in mega103 compatibility mode
R/W
15
R
–
7
0
0
R/W
14
R
–
6
0
0
Error[%]
R/W
13
R
–
5
0
0
=
⎛
⎝
BaudRate
------------------------------------------------------- - 1
186). The error values are calculated using the following
R/W
12
R
–
4
0
0
UBRRn[7:0]
BaudRate
Closest Match
R/W
R/W
11
3
0
0
R/W
R/W
10
UBRRn[11:8]
2
0
0
–
⎞
⎠
•
100%
R/W
R/W
9
1
0
0
ATmega64(L)
R/W
R/W
Table 82
8
0
0
0
UBRRnH
UBRRnL
to
Table
“Asyn-
193
85.