ATMEGA64L-8MU Atmel, ATMEGA64L-8MU Datasheet - Page 158

IC AVR MCU 64K 8MHZ 3V 64-QFN

ATMEGA64L-8MU

Manufacturer Part Number
ATMEGA64L-8MU
Description
IC AVR MCU 64K 8MHZ 3V 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64L-8MU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
JTAG/SPI/TWI/USART
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
MLF EP
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Package
64MLF EP
Family Name
ATmega
Maximum Speed
8 MHz
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA64L-8MU
Quantity:
113
Part Number:
ATMEGA64L-8MUR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
2490Q–AVR–06/10
Table 64. Waveform Generation Mode Bit Description
Note:
• Bit 5:4 – COM21:0: Compare Match Output Mode
These bits control the Output Compare pin (OC2) behavior. If one or both of the COM21:0 bits
are set, the OC2 output overrides the normal port functionality of the I/O pin it is connected to.
However, note that the Data Direction Register (DDR) bit corresponding to the OC2 pin must be
set in order to enable the output driver.
When OC2 is connected to the pin, the function of the COM21:0 bits depends on the WGM21:0
bit setting.
Normal or CTC mode (non-PWM).
Table 65. Compare Output Mode, non-PWM Mode
Table 66
mode.
Table 66. Compare Output Mode, Fast PWM Mode
Note:
Table 67
PWM mode.
Mode
0
1
2
3
COM21
COM21
0
0
1
1
0
0
1
1
1. The CTC2 and PWM2 bit definition names are now obsolete. Use the WGM21:0 definitions.
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the Compare
shows the COM21:0 bit functionality when the WGM21:0 bits are set to phase correct
WGM21
shows the COM21:0 bit functionality when the WGM21:0 bits are set to fast PWM
(CTC2)
Table 65
However, the functionality and location of these bits are compatible with previous versions of
the timer.
Match is ignored, but the set or clear is done at BOTTOM. See
for more details.
0
0
1
1
COM20
COM20
WGM20
(PWM2)
0
1
0
1
0
1
0
1
shows the COM21:0 bit functionality when the WGM21:0 bits are set to a
0
1
0
1
Description
Normal port operation, OC2 disconnected.
Toggle OC2 on Compare Match.
Clear OC2 on Compare Match.
Set OC2 on Compare Match.
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on Compare Match, set OC2 at BOTTOM,
(non-inverting mode).
Set OC2 on Compare Match, clear OC2 at BOTTOM,
(inverting mode).
Timer/Counter Mode
of Operation
Normal
PWM, Phase Correct
CTC
Fast PWM
(1)
TOP
0xFF
0xFF
OCR2
0xFF
(1)
Update of
OCR2
TOP
Immediate
Immediate
BOTTOM
“Fast PWM Mode” on page 152
ATmega64(L)
TOV2 Flag
Set on
MAX
BOTTOM
MAX
MAX
158

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