ATMEGA64L-8MU Atmel, ATMEGA64L-8MU Datasheet - Page 277

• Manufacturer Part Number: ATMEGA64L-8MU
• Description: IC AVR MCU 64K 8MHZ 3V 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64L-8MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: JTAG/SPI/TWI/USART
• Total Internal Ram Size: 4KB
• # I/os (max): 53
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: MLF EP
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Package: 64MLF EP
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 2KB
• Ram Memory Size: 4KB
• Cpu Speed: 8MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Boot Loader
Support – Read-
While-Write
Self-
programming
Features
Application and
Boot Loader Flash
Sections
Application Section
BLS – Boot Loader
Section
Read-While-Write
and No Read-
While-Write Flash
Sections
2490Q–AVR–06/10
The Boot Loader Support provides a real Read-While-Write Self-programming mechanism for
downloading and uploading program code by the MCU itself. This feature allows flexible applica-
tion software updates controlled by the MCU using a Flash-resident Boot Loader program. The
Boot Loader program can use any available data interface and associated protocol to read code
and write (program) that code into the Flash memory, or read the code from the program mem-
ory. The program code within the Boot Loader section has the capability to write into the entire
Flash, including the Boot Loader Memory. The Boot Loader can thus even modify itself, and it
can also erase itself from the code if the feature is not needed anymore. The size of the Boot
Loader Memory is configurable with Fuses and the Boot Loader has two separate sets of Boot
Lock bits which can be set independently. This gives the user a unique flexibility to select differ-
ent levels of protection.
•
•
•
•
•
•
•
Note:
The Flash memory is organized in two main sections, the Application section and the Boot
Loader section (see
Fuses as shown in
ent levels of protection since they have different sets of Lock bits.
The Application section is the section of the Flash that is used for storing the application code.
The protection level for the Application section can be selected by the application Boot Lock bits
(Boot Lock bits 0), see
Boot Loader code since the SPM instruction is disabled when executed from the Application
section.
While the Application section is used for storing the application code, the Boot Loader software
must be located in the BLS since the SPM instruction can initiate a programming when execut-
ing from the BLS only. The SPM instruction can access the entire Flash, including the BLS itself.
The protection level for the Boot Loader section can be selected by the Boot Loader Lock bits
(Boot Lock bits 1), see
Whether the CPU supports Read-While-Write or if the CPU is halted during a Boot Loader soft-
ware update is dependent on which address that is being programmed. In addition to the two
sections that are configurable by the BOOTSZ Fuses as described above, the Flash is also
divided into two fixed sections, the Read-While-Write (RWW) section and the No Read-While-
Write (NRWW) section. The limit between the RWW- and NRWW sections is given in
“ATmega64 Boot Loader Parameters” on page 289
ference between the two sections is:
•
•
Note that the user software can never read any code that is located inside the RWW section dur-
ing a Boot Loader software operation. The syntax “Read-While-Write section” refers to which
Read-While-Write Self-programming
Flexible Boot Memory Size
High Security (Separate Boot Lock Bits for a Flexible Protection)
Separate Fuse to Select Reset Vector
Optimized Page
Code Efficient Algorithm
Efficient Read-Modify-Write Support
When erasing or writing a page located inside the RWW section, the NRWW section can be
read during the operation.
When erasing or writing a page located inside the NRWW section, the CPU is halted during
the entire operation.
1. A page is a section in the Flash consisting of several bytes (see
during programming. The page organization does not affect normal operation.
(1)
Table 112 on page 289
Size
Figure
Table 109 on page
Table 108 on page
136). The size of the different sections is configured by the BOOTSZ
280.
and
280. The Application section can never store any
Figure
and
136. These two sections can have differ-
Figure 136 on page
Table 123 on page
ATmega64(L)
279. The main dif-
296) used
277