ATMEGA64L-8MU Atmel, ATMEGA64L-8MU Datasheet - Page 297

IC AVR MCU 64K 8MHZ 3V 64-QFN

ATMEGA64L-8MU

Manufacturer Part Number
ATMEGA64L-8MU
Description
IC AVR MCU 64K 8MHZ 3V 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64L-8MU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
JTAG/SPI/TWI/USART
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
MLF EP
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Package
64MLF EP
Family Name
ATmega
Maximum Speed
8 MHz
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA64L-8MU
Quantity:
113
Part Number:
ATMEGA64L-8MUR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Parallel
Programming
Enter Programming
Mode
Considerations for
Efficient Programming
Chip Erase
2490Q–AVR–06/10
The following algorithm puts the device in Parallel Programming mode:
1. Apply 4.5V - 5.5V between V
2. Set RESET to “0” and toggle XTAL1 at least six times.
3. Set the Prog_enable pins listed in
4. Apply 11.5V - 12.5V to RESET. Any activity on Prog_enable pins within 100 ns after
Note, if External Crystal or External RC configuration is selected, it may not be possible to apply
qualified XTAL1 pulses. In such cases, the following algorithm should be followed:
1. Set Prog_enable pins listed in
2. Apply 4.5V - 5.5V between V
3. Wait 100 µs.
4. Re-program the fuses to ensure that External Clock is selected as clock source
5. Exit Programming mode by power the device down or by bringing RESET pin to 0b0.
6. Entering Programming mode with the original algorithm, as described above.
The loaded command and address are retained in the device during programming. For efficient
programming, the following should be considered.
The Chip Erase will erase the Flash and EEPROM
not reset until the program memory has been completely erased. The Fuse bits are not
changed. A Chip Erase must be performed before the Flash and/or the EEPROM
reprogrammed.
Note:
Load Command “Chip Erase”
1. Set XA1, XA0 to “10”. This enables command loading.
2. Set BS1 to “0”.
3. Set DATA to “1000 0000”. This is the command for Chip Erase.
4. Give XTAL1 a positive pulse. This loads the command.
5. Give WR a negative pulse. This starts the Chip Erase. RDY/BSY goes low.
6. Wait until RDY/BSY goes high before loading a new command.
ns.
+12V has been applied to RESET, will cause the device to fail entering Programming
mode.
RESET.
(CKSEL3:0 = 0b0000) If Lock bits are programmed, a Chip Erase command must be
executed before changing the fuses.
The command needs only be loaded once when writing or reading multiple memory
locations.
Skip writing the data value 0xFF, that is the contents of the entire EEPROM (unless the
EESAVE Fuse is programmed) and Flash after a Chip Erase.
Address high byte needs only be loaded before programming or reading a new 256 word
window in Flash or 256 byte EEPROM. This consideration also applies to Signature bytes
reading.
1. The EEPRPOM memory is preserved during chip erase if the EESAVE Fuse is programmed.
CC
CC
Table on page 295
and GND, and wait at least 100 µs.
and GND simultaneously as 11.5V - 12.5V is applied to
Table 121 on page 295
(1)
memories plus Lock bits. The Lock bits are
to “0000”.
to “0000” and wait at least 100
ATmega64(L)
297

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