EP9312-CBZ Cirrus Logic Inc, EP9312-CBZ Datasheet - Page 187

• Manufacturer Part Number: EP9312-CBZ
• Description: IC ARM9 SOC UNIVERSAL 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Digital Ic Case Style: BGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1258

4 bits per pixel
bit 31
Pixel 6 Pixel 7 Pixel 4 Pixel 5 Pixel 2
8 bits per pixel
bit 31
15 or 16 bits per pixel
bit 31
24 bits per pixel packed
bit 31
bit 31
bit 31
DS785UM1
Pixel 2 Green
Pixel 1 Blue
Pixel 3
Byte 3
Byte 3
Byte 3
Byte 3
Byte 7
Byte B
bit 24 bit 23
bit 24 bit 23
bit 24 bit 23
bit 24 bit 23
bit 24 bit 23
bit 24 bit 23
most significant location on a per byte basis.
words in a byte oriented Frame Buffer organization.
Pixel 1
Pixel 2 Blue
Pixel 0 Red
Pixel 2
Byte A
Byte 2
Byte 2
Byte 2
Byte 2
Byte 6
As stored in memory
bit 16 bit 15
bit 16 bit 15
bit 16 bit 15
bit 16 bit 15
bit 16 bit 15
bit 16 bit 15
32-bit Word 0
32-bit Word 1
32-bit Word 2
32-bit Word
32-bit Word
32-bit Word
Pixel 0 Green
Table 7-2. Byte Oriented Frame Buffer Organization
Pixel 1 Red
Pixel 1
Byte 1
Byte 5
Byte 9
Byte1
Byte1
Byte1
Pixel 3 Pixel 0
bit 8 bit 7
bit 8 bit 7
bit 8 bit 7
bit 8 bit 7
bit 8 bit 7
bit 8 bit 7
Pixel 0
Copyright 2007 Cirrus Logic
Pixel 1 Green
Pixel 0 Blue
Pixel 0
Byte 0
Byte 0
Byte 0
Byte 0
Byte 4
Byte 8
Raster Engine With Analog/LCD Integrated Timing and Interface
Pixel 1
bit 0
bit 0
bit 0
bit 0
bit 0
bit 0
Table 7-2
Pixel 0 is first pixel out (upper left corner of screen) -->
Pixel
0
bit 7
bit 7
bit 15
bit 23
bit 15
bit 7
Word 0
Word 0
Word 0
Byte 0
Pixel 0
Byte 0
Pixel 0
Byte 1
Byte 2
Green
Byte 0
Byte1
Blue
Red
In pixel output order (progressive scan)
bit 0
bit 16 bit 15
Pixel
bit 0 bit 15
bit 0 bit 15
bit 8 bit 7
bit 8 bit 7
demonstrates pixel packing within
Pixel 0
1
Pixel 2
bit 31
Word 1
Word 1
Word 0
Pixel 1
Pixel 1
Byte 0
Byte 5
Green
Byte 4
Byte 3
Byte1
Byte1
Blue
Red
bit 24
32-bit Word
32-bit Word
32-bit Word
Pixel
bit 8 bit 23
bit 8 bit 23
bit 0 bit 31
bit 8 bit 7
bit 0 bit 31
3
Pixel
4
bit 23
Word 1
Word 1
Word 2
Pixel 2
Pixel 2
EP93xx User’s Guide
Byte 2
Byte 2
Byte 3
Byte 8
Green
Byte 7
Byte 6
Blue
Red
bit 16
bit 16 bit 31
bit 16 bit 31
bit 24 bit 23
bit 24 bit 23
Pixel
bit 0 bit 31
Pixel 1
5
Pixel
6
bit 15
Word 2
Word 2
Word 2
Byte 3
Pixel 3
Byte 3
Byte 2
Pixel 3
Byte B
Byte A
Green
Byte 9
Blue
Red
bit 8
bit 24
bit 24
bit 16
bit 24
bit 16
Pixel
7-5
7
7