EP9312-IB Cirrus Logic Inc, EP9312-IB Datasheet - Page 575

• Manufacturer Part Number: EP9312-IB
• Description: IC ARM920T MCU 200MHZ 352-PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-IB

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 352-BGA
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No
• Other names: 598-1259

UART2TMR
DS785UM1
31
15
Address:
Default:
Definition:
Bit Descriptions:
30
14
29
13
28
12
0x808D_0084 - Read/Write
0x0000_0000
UART SIR Loopback Register
RSVD:
0:
SIRTEST:
RSVD
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Reserved. Unknown During Read.
Must be written as “0”. Unknown During Read.
SIR test enable. Setting this bit to “1” enables the receive data
path during IrDA transmission (testing requires SIR to be
configured in full-duplex mode). This bit must be set to “1” to
enable SIR system loopback testing, when the normal mode
control register UART2Ctrl bit 7, Loop Back Enable
been set to “1”. Clearing this bit to 0 disabled the receive
logic when the SIR is transmitting (normal operation). This
bit defaults to 0 for normal (half-duplex) operation.
24
8
RSVD
23
7
22
6
21
5
0
20
4
19
3
EP93xx User’s Guide
18
2
SIRTEST
(LBE), has
17
1
UART2
15-17
16
0
0
15