ST72F324J4B6 STMicroelectronics, ST72F324J4B6 Datasheet - Page 44
![IC MCU 8BIT 16K FLASH 42-PDIP](/photos/7/28/72890/497-42-dip__600_mil__series_sml.jpg)
ST72F324J4B6
Manufacturer Part Number
ST72F324J4B6
Description
IC MCU 8BIT 16K FLASH 42-PDIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F324J2T6.pdf
(164 pages)
Specifications of ST72F324J4B6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
3.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7F521-IND/USB, ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST72F324J4B6
Manufacturer:
ST
Quantity:
20 000
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- Download datasheet (3Mb)
ST72324Jx ST72324Kx
POWER SAVING MODES (Cont’d)
8.4.2.1 Halt Mode Recommendations
– Make sure that an external event is available to
– When using an external interrupt to wake up the
– For the same reason, reinitialize the level sensi-
44/164
1
wake up the microcontroller from Halt mode.
microcontroller, reinitialize the corresponding I/O
as “Input Pull-up with Interrupt” before executing
the HALT instruction. The main reason for this is
that the I/O may be wrongly configured due to ex-
ternal interference or by an unforeseen logical
condition.
tiveness of each external interrupt as a precau-
tionary measure.
– The opcode for the HALT instruction is 0x8E. To
– As the HALT instruction clears the interrupt mask
avoid an unexpected HALT instruction due to a
program counter failure, it is advised to clear all
occurrences of the data value 0x8E from memo-
ry. For example, avoid defining a constant in
ROM with the value 0x8E.
in the CC register to allow interrupts, the user
may choose to clear all pending interrupt bits be-
fore executing the HALT instruction. This avoids
entering other peripheral interrupt routines after
executing the external interrupt routine corre-
sponding to the wake-up event (reset or external
interrupt).
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