ST72F521AR9TC STMicroelectronics, ST72F521AR9TC Datasheet - Page 186

IC MCU 8BIT 60K FLASH 64-TQFP

ST72F521AR9TC

Manufacturer Part Number
ST72F521AR9TC
Description
IC MCU 8BIT 60K FLASH 64-TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F521AR9TC

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TQFP, 64-VQFP
For Use With
497-6453 - BOARD EVAL BASED ON ST7LNBX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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ST72F521, ST72521B
CONTROL PIN CHARACTERISTICS (Cont’d)
Figure 103. RESET pin protection when LVD is enabled.
Figure 104. RESET pin protection when LVD is disabled.
Note 1:
Note 2: When the LVD is enabled, it is recommended not to connect a pull-up resistor or capacitor. A 10nF pull-down
capacitor is required to filter noise on the reset line.
Note 3: In case a capacitive power supply is used, it is recommended to connect a 1MΩ pull-down resistor to the RESET
pin to discharge any residual voltage induced by the capacitive effect of the power supply (this will add 5µA to the power
consumption of the MCU).
Note 4: Tips when using the LVD:
186/215
Required
– The reset network protects the device against parasitic resets.
– The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad. Otherwise the
– Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin can go
– Because the reset circuit is designed to allow the internal RESET to be output in the RESET pin, the user must en-
– 1. Check that all recommendations related to reset circuit have been applied (see notes above).
– 2. Check that the power supply is properly decoupled (100nF + 10µF close to the MCU). Refer to AN1709 and
– 3. The capacitors connected on the RESET pin and also the power supply are key to avoid any start-up marginality.
EXTERNAL
EXTERNAL
CIRCUIT
device can be damaged when the ST7 generates an internal reset (LVD or watchdog).
below the V
internally.
sure that the current sunk on the RESET pin is less than the absolute maximum value specified for I
section 12.2.2 on page
AN2017. If this cannot be done, it is recommended to put a 100nF + 1MΩ pull-down on the RESET pin.
In most cases, steps 1 and 2 above are sufficient for a robust solution. Otherwise: replace 10nF pull-down on the
RESET pin with a 5µF to 20µF capacitor.
RESET
USER
Recommended for EMC
RESET
Required
IL
V
max. level specified in
DD
0.01µF
0.01µF
0.01µF
166.
1MΩ
Optional
(note 3)
V
DD
section 12.9.1 on page
4.7kΩ
V
V
DD
DD
R
R
ON
ON
Filter
Filter
185. Otherwise the reset will not be taken into account
1)2)3)4)
1)
GENERATOR
GENERATOR
PULSE
PULSE
INTERNAL
RESET
INTERNAL
RESET
WATCHDOG
WATCHDOG
LVD RESET
INJ(RESET)
ST72XXX
ST72XXX
in

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