W77E058A40DL Nuvoton Technology Corporation of America, W77E058A40DL Datasheet - Page 13
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W77E058A40DL
Manufacturer Part Number
W77E058A40DL
Description
IC MCU 8-BIT 32K FLASH 40-DIP
Manufacturer
Nuvoton Technology Corporation of America
Series
W77r
Specifications of W77E058A40DL
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, Serial Port
Peripherals
POR, WDT
Number Of I /o
32
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP
Cpu Family
W77
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
UART
Total Internal Ram Size
1KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
40
Package Type
PDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
W77E058A40DL
Manufacturer:
WINBOND
Quantity:
4 500
Company:
Part Number:
W77E058A40DL
Manufacturer:
WINBOND
Quantity:
5
Part Number:
W77E058A40DL
Manufacturer:
WINBOND/华邦
Quantity:
20 000
A brief description of the SFRs now follows.
Port 0
Port 0 is an open-drain bi-directional I/O port. This port also provides a multiplexed low order
address/data bus during accesses to external memory.
Stack Pointer
The Stack Pointer stores the Scratchpad RAM address where the stack begins. In other words, it
always points to the top of the stack.
Data Pointer Low
This is the low byte of the standard 8052 16-bit data pointer.
Data Pointer High
This is the high byte of the standard 8052 16-bit data pointer.
Data Pointer Low 1
Mnemonic: P0
Mnemonic: SP
Mnemonic: DPL
Mnemonic: DPH
Mnemonic: DPL1
Bit:
Bit:
Bit:
Bit:
Bit:
DPL1.7 DPL1.6 DPL1.5 DPL1.4 DPL1.3 DPL1.2 DPL1.1 DPL1.0
DPH.7
DPL.7
SP.7
P0.7
7
7
7
7
7
DPH.6
DPL.6
SP.6
P0.6
6
6
6
6
6
DPH.5
DPL.5
SP.5
P0.5
5
5
5
5
5
- 13 -
DPH.4
DPL.4
P0.4
SP.4
4
4
4
4
4
Publication Release Date: February 17, 2005
DPH.3
DPL.3
SP.3
P0.3
3
3
3
3
3
Address: 82h
Address: 80h
Address: 81h
Address: 83h
Address: 84h
DPH.2
DPL.2
SP.2
P0.2
2
2
2
2
2
DPH.1
DPL.1
P0.1
SP.1
1
1
1
1
1
W77E58
Revision A6
DPH.0
DPL.0
P0.0
SP.0
0
0
0
0
0