W77E058A40DL Nuvoton Technology Corporation of America, W77E058A40DL Datasheet - Page 63

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W77E058A40DL

Manufacturer Part Number
W77E058A40DL
Description
IC MCU 8-BIT 32K FLASH 40-DIP
Manufacturer
Nuvoton Technology Corporation of America
Series
W77r
Datasheets

Specifications of W77E058A40DL

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, Serial Port
Peripherals
POR, WDT
Number Of I /o
32
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP
Cpu Family
W77
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
UART
Total Internal Ram Size
1KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
40
Package Type
PDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant

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If the first bit detected after the falling edge of RxD pin, is not 0, then this indicates an invalid start bit,
and the reception is immediately aborted. The serial port again looks for a falling edge in the RxD line.
If a valid start bit is detected, then the rest of the bits are also detected and shifted into the SBUF.
After shifting in 9 data bits, there is one more shift to do, after which the SBUF and RB8 are loaded
and RI is set. However certain conditions must be met before the loading and setting of RI can be
done.
If these conditions are met, then the stop bit goes to RB8, the 8 data bits go into SBUF and RI is set.
Otherwise the received frame may be lost. After the middle of the stop bit, the receiver goes back to
looking for a 1-to-0 transition on the RxD pin.
(SMOD_1)
SMOD=
div. by 4
div. by 64
div. by 1024 osc/512
Mode
1. RI must be 0 and
2. Either SM2 = 0, or the received stop bit = 1.
Clock Source
SAMPLE
RXD
2
0
osc/2
osc/32
input
1
DETECTOR
1-TO-0
16
16
Write to
SBUF
RX CLOCK
RX START
TX START
TX CLOCK
CONTROLLER
DETECTOR
SERIAL
Figure 22. Serial Port Mode 2
BIT
Data Bus
Internal
RX SHIFT
SHIFT
LOAD
SBUF
TX
TB8
RI
TI
- 63 -
CLOCK
SIN
Receive Shift Register
PAROUT
Publication Release Date: February 17, 2005
START
LOAD
CLOCK
STOP
D8
PARIN
Transmit Shift Register
D8
SOUT
SBUF
RB8
Serial Port
Interrupt
Read
SBUF
TXD
W77E58
Internal
Revision A6
Data
Bus

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