W77E058A40DL Nuvoton Technology Corporation of America, W77E058A40DL Datasheet - Page 52

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W77E058A40DL

Manufacturer Part Number
W77E058A40DL
Description
IC MCU 8-BIT 32K FLASH 40-DIP
Manufacturer
Nuvoton Technology Corporation of America
Series
W77r
Datasheets

Specifications of W77E058A40DL

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, Serial Port
Peripherals
POR, WDT
Number Of I /o
32
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP
Cpu Family
W77
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
UART
Total Internal Ram Size
1KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
40
Package Type
PDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant

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Timer/Counter 0 and bit 6 of TMOD selects the function for Timer/Counter 1. In addition each
Timer/Counter can be set to operate in any one of four possible modes. The mode selection is done
by bits M0 and M1 in the TMOD SFR.
13.2 Time-base Selection
The W77E58 gives the user two modes of operation for the timer. The timers can be programmed to
operate like the standard 8051 family, counting at the rate of 1/12 of the clock speed. This will ensure
that timing loops on the W77E58 and the standard 8051 can be matched. This is the default mode of
operation of the W77E58 timers. The user also has the option to count in the turbo mode, where the
timers will increment at the rate of 1/4 clock speed. This will straight-away increase the counting
speed three times. This selection is done by the T0M and T1M bits in CKCON SFR. A reset sets these
bits to 0, and the timers then operate in the standard 8051 mode. The user should set these bits to 1 if
the timers are to operate in turbo mode.
13.2.1 Mode 0
In Mode 0, the timer/counters act as a 8 bit counter with a 5 bit, divide by 32 pre-scale. In this mode
we have a 13 bit timer/counter. The 13 bit counter consists of 8 bits of THx and 5 lower bits of TLx.
The upper 3 bits of TLx are ignored.
The negative edge of the clock increments the count in the TLx register. When the fifth bit in TLx
moves from 1 to 0, then the count in the THx register is incremented. When the count in THx moves
from FFh to 00h, then the overflow flag TFx in TCON SFR is set. The counted input is enabled only if
TRx is set and either GATE = 0 or INTx = 1. When C T
and if C T
timer 1. When the 13 bit count reaches 1FFFh the next count will cause it to roll-over to 0000h. The
timer overflow flag TFx of the relevant timer is set and if enabled an interrupts will occur. Note that
when used as a timer, the time-base may be either clock cycles/12 or clock cycles/4 as selected by
the bits TxM of the CKCON SFR.
div. by 4
div. by 64
div. by 1024 osc/256
M ode
Clock Source
(GATE = T M OD.7)
GATE = T M OD.3
(TR1 = TCON.6)
TR0 = TCON.4
(T1 = P3.5)
(INT1 = P3.3)
/
T0 = P3.4
INT0 = P3.2
osc/1
osc/16
is set to 1, then it will count 1 to 0 transitions on T0 (P3.4) for timer 0 and T1 (P3.5) for
input
(T 1M = CKCON.4)
T 0M = CKCON.3
1/12
1/4
1
0
Figure 11. Timer/Counter Mode 0 & Mode 1
(C/T = TM OD.6)
C/T = TM OD.2
0
1
- 52 -
0
/
Timer 1 functions are shown in brackets
is set to 0, then it will count clock cycles,
(TL1)
TL0
4
(M 1,M 0 = TM OD.5,TM OD.4)
M 1,M 0 = TM OD.1,TM OD.0
7
(TF1)
TFx
TF0
00
01
0
Interrupt
(TH1)
TH0
W77E58
7

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