ST10F269Z2Q6 STMicroelectronics, ST10F269Z2Q6 Datasheet - Page 147

MCU 16BIT 256K FLASH 144PQFP

ST10F269Z2Q6

Manufacturer Part Number
ST10F269Z2Q6
Description
MCU 16BIT 256K FLASH 144PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheets

Specifications of ST10F269Z2Q6

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-QFP
Controller Family/series
ST10
No. Of I/o's
111
Ram Memory Size
12KB
Cpu Speed
40MHz
No. Of Timers
5
Embedded Interface Type
CAN, SSC, USART
Rohs Compliant
Yes
Processor Series
ST10F26x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SSC, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
2 x 16 bit
Operating Supply Voltage
0.3 V to 4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit x 10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-4833

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ST10F269
between two consecutive edges of the CPU clock,
called “TCL”.
The CPU clock signal can be generated by
different mechanisms. The duration of TCL and its
variation (and also the derived external timing)
The mechanism used to generate the CPU clock is selected during reset by the logic levels on pins
P0.15-13 (P0H.7-5).
Figure 68 : Generation Mechanisms for the CPU Clock
Phase locked loop operation
Direct Clock Drive
Prescaler Operation
f
f
f
f
f
f
XTAL
CPU
XTAL
CPU
XTAL
CPU
depends on the mechanism used to generate
f
This influence must be regarded when calculating
the timings for the ST10F269.
The example for PLL operation shown in
Figure 68 refers to a PLL factor of 4.
CPU
.
TCL
TCL
TCL TCL
TCL TCL
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