ST10F269Z2Q6 STMicroelectronics, ST10F269Z2Q6 Datasheet - Page 69

• Manufacturer Part Number: ST10F269Z2Q6
• Description: MCU 16BIT 256K FLASH 144PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F269Z2Q6

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-QFP
• Controller Family/series: ST10
• No. Of I/o's: 111
• Ram Memory Size: 12KB
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Embedded Interface Type: CAN, SSC, USART
• Rohs Compliant: Yes
• Processor Series: ST10F26x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SSC, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 2 x 16 bit
• Operating Supply Voltage: 0.3 V to 4 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit x 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-4833

ST10F269
the output latch is clocked by the signal “Compare
Trigger”.
The direction of the pin should be set to output by
the user, otherwise the pin will be in the
high-impedance state and will not reflect the state
of the output latch.
Figure 26, the user software always has free
access to the port pin even when it is used as a
compare output. This is useful for setting up the
initial level of the pin when using compare mode 1
or the double-register mode. In these modes,
unlike in compare mode 3, the pin is not set to a
specific value when a compare match occurs, but
is toggled instead.
When the user wants to write to the port pin at the
same time a compare trigger tries to clock the
output latch, the write operation of the user
software has priority. Each time a CPU write
access to the port output latch occurs, the input
Table 19 : Alternate Functions of Port 2
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P2.8
P2.9
P2.10
P2.11
P2.12
P2.13
P2.14
P2.15
As can be seen from the port structure in
Port 2 Pin
CC0IO
CC1IO
CC2IO
CC3IO
CC4IO
CC5IO
CC6IO
CC7IO
CC8IO
CC9IO
CC10IO
CC11IO
CC12IO
CC13IO
CC14IO
CC15IO
Alternate Function a)
-
-
-
-
-
-
-
-
EX0IN
EX1IN
EX2IN
EX3IN
EX4IN
EX5IN
EX6IN
EX7IN
Alternate Function b)
Fast External Interrupt 0 Input
Fast External Interrupt 1 Input
Fast External Interrupt 2 Input
Fast External Interrupt 3 Input
Fast External Interrupt 4 Input
Fast External Interrupt 5 Input
Fast External Interrupt 6 Input
Fast External Interrupt 7 Input
multiplexer of the port output latch is switched to
the line connected to the internal bus. The port
output latch will receive the value from the internal
bus and the hardware triggered change will be
lost.
function of pins P2.15...P2.0 can also be used as
external interrupt inputs (200ns sample rate at
40MHz CPU clock on PQFP144 devices and
250ns sample rate at 32MHz CPU clock on
TQFP144 devices).
The upper eight Port 2 lines (P2.15...P2.8) also
can serve as Fast External Interrupt inputs from
EX0IN to EX7IN (Fast external interrupt sampling
rate is 25ns at 40MHz CPU clock and 31.25ns at
32MHz CPU clock).
timer T7 (T7IN). The Table 19 summarizes the
alternate functions of Port 2.
P2.15 in addition serves as input for CAPCOM2
As all other capture inputs, the capture input
12 - PARALLEL PORTS
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
T7IN T7 External Count Input
Alternate Function c)
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