C8051F333-GMR Silicon Laboratories Inc, C8051F333-GMR Datasheet - Page 33

IC 8051 MCU 4K FLASH 20MLP

C8051F333-GMR

Manufacturer Part Number
C8051F333-GMR
Description
IC 8051 MCU 4K FLASH 20MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Datasheets

Specifications of C8051F333-GMR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
17
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F330DK
Minimum Operating Temperature
- 40 C
For Use With
336-1451 - ADAPTER PROGRAM TOOLSTICK F330
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F333-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
4.
XTAL1
XTAL2
Name
C2CK
VREF
P2.0/
P0.0/
P0.2/
P0.3/
GND
RST/
IDA0
P0.1
P0.4
P0.5
C2D
V
DD
Pinout and Package Definitions
‘F330/1/2/
3/4/5-GM
Pin
20
19
18
17
16
3
2
4
5
1
Table 4.1. Pin Definitions for the C8051F330/1/2/3/4/5
’F330-GP
Pin
20
19
6
5
7
8
4
3
2
1
D I/O or
D I/O or
D I/O or
D I/O or
A I/O or
D I/O or
D I/O or
D I/O
D I/O
D I/O
D I/O
AOut
Type
A In
A In
A In
A In
A In
A In
D In
A In
A In
Power Supply Voltage.
Ground.
Device Reset. Open-drain output of internal POR or V
monitor. An external source can initiate a system reset by
driving this pin low for at least 10 µs.
Clock signal for the C2 Debug Interface.
Port 3.0. See
Bi-directional data signal for the C2 Debug Interface.
Port 0.0. See
External VREF input. See
tion.
Port 0.1. See
IDA0 Output. See
Port 0.2. See
External Clock Input. This pin is the external oscillator
return for a crystal or resonator. See
plete description.
Port 0.3. See
External Clock Output. For an external crystal or resonator,
this pin is the excitation driver. This pin is the external clock
input for CMOS, capacitor, or RC oscillator configurations.
See
Port 0.4. See
Port 0.5. See
Rev. 1.7
Section 13
Section 14
Section 14
Section 14
Section 14
Section 14
Section 14
Section 14
for a complete description.
C8051F330/1/2/3/4/5
Section 6
Description
for a complete description.
for a complete description.
for a complete description.
for a complete description.
for a complete description.
for a complete description.
for a complete description.
Section 7
for a complete description.
for a complete descrip-
Section 13
for a com-
DD
35

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