C8051F333-GMR Silicon Laboratories Inc, C8051F333-GMR Datasheet - Page 42

IC 8051 MCU 4K FLASH 20MLP

C8051F333-GMR

Manufacturer Part Number
C8051F333-GMR
Description
IC 8051 MCU 4K FLASH 20MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Datasheets

Specifications of C8051F333-GMR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
17
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F330DK
Minimum Operating Temperature
- 40 C
For Use With
336-1451 - ADAPTER PROGRAM TOOLSTICK F330
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F333-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
5.3.2. Tracking Modes
Each ADC0 conversion must be preceded by a minimum tracking time in order for the converted result to
be accurate. The minimum tracking time is given in Table 5.1. The AD0TM bit in register ADC0CN controls
the ADC0 track-and-hold mode. In its default state, the ADC0 input is continuously tracked, except when a
conversion is in progress. When the AD0TM bit is logic 1, ADC0 operates in low-power track-and-hold
mode. In this mode, each conversion is preceded by a tracking period of 3 SAR clocks (after the start-of-
conversion signal). When the CNVSTR signal is used to initiate conversions in low-power tracking mode,
ADC0 tracks only when CNVSTR is low; conversion begins on the rising edge of CNVSTR (see
Figure 5.3). Tracking can also be disabled (shutdown) when the device is in low power standby or sleep
modes. Low-power track-and-hold mode is also useful when AMUX settings are frequently changed, due
to the settling time requirements described in
(AD0CM[2:0]=000, 001,010
Timer 1, Timer 3 Overflow
Write '1' to AD0BUSY,
(AD0CM[2:0]=100)
Timer 0, Timer 2,
Figure 5.3. 10-Bit ADC Track and Conversion Example Timing
SAR Clocks
SAR Clocks
SAR Clocks
AD0TM=1
AD0TM=0
011, 101)
AD0TM=1
AD0TM=0
CNVSTR
Low Power
or Convert
Low Power
or Convert
Track or
Convert
A. ADC0 Timing for External Trigger Source
Track or Convert
B. ADC0 Timing for Internal Trigger Source
1
1
Section “5.3.3. Settling Time Requirements” on page
Track
2
2
Track
Rev. 1.7
3
3
4
4
1
5
5
Convert
2
6
6
3
7
7
C8051F330/1/2/3/4/5
4
8
Convert
8
Convert
Convert
5
9
9
6
10 11 12
10 11
7
8
9
13 14
10 11
Low Power Mode
Track
Low Power
Mode
Track
46.
45

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