S9S12P96J0MFT Freescale Semiconductor, S9S12P96J0MFT Datasheet - Page 406

• Manufacturer Part Number: S9S12P96J0MFT
• Description: MCU 96K FLASH AUTO 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12P96J0MFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Serial Peripheral Interface (S12SPIV5)
12.3.2.3
Read: Anytime
Write: Anytime; writes to the reserved bits have no effect
The baud rate divisor equation is as follows:
The baud rate can be calculated with the following equation:
406
Module Base +0x0002
SPPR[2:0]
SPR[2:0]
SPPR2
Reset
Field
6–4
2–0
0
0
0
0
0
0
0
0
0
0
0
0
W
R
SPI Baud Rate Preselection Bits — These bits specify the SPI baud rates as shown in
mode, a change of these bits will abort a transmission in progress and force the SPI system into idle state.
SPI Baud Rate Selection Bits — These bits specify the SPI baud rates as shown in
a change of these bits will abort a transmission in progress and force the SPI system into idle state.
Table 12-7. Example SPI Baud Rate Selection (25 MHz Bus Clock) (Sheet 1 of 3)
SPI Baud Rate Register (SPIBR)
0
0
7
For maximum allowed baud rates, please refer to the SPI Electrical
Specification in the Electricals chapter of this data sheet.
SPPR1
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
SPPR2
0
6
Baud Rate = BusClock / BaudRateDivisor
BaudRateDivisor = (SPPR + 1) • 2
SPPR0
0
0
0
0
0
0
0
0
1
1
1
1
Figure 12-5. SPI Baud Rate Register (SPIBR)
S12P-Family Reference Manual, Rev. 1.13
Table 12-6. SPIBR Field Descriptions
SPPR1
0
5
SPR2
0
0
0
0
1
1
1
1
0
0
0
0
SPPR0
NOTE
SPR1
0
4
0
0
1
1
0
0
1
1
0
0
1
1
Description
SPR0
(SPR + 1)
0
0
0
1
0
1
0
1
0
1
0
1
0
1
3
Baud Rate
SPR2
Divisor
0
2
128
256
16
32
64
16
32
2
4
8
4
8
Table
Freescale Semiconductor
SPR1
12-7. In master mode,
Table
0
1
1.5625 Mbit/s
1.5625 Mbit/s
781.25 kbit/s
390.63 kbit/s
195.31 kbit/s
781.25 kbit/s
3.125 Mbit/s
3.125 Mbit/s
97.66 kbit/s
Baud Rate
12.5 Mbit/s
6.25 Mbit/s
6.25 Mbit/s
12-7. In master
Eqn. 12-1
Eqn. 12-2
SPR0
0
0