TMP86FH46ANG(Z) Toshiba, TMP86FH46ANG(Z) Datasheet - Page 124
TMP86FH46ANG(Z)
Manufacturer Part Number
TMP86FH46ANG(Z)
Description
IC MCU 8BIT FLASH 16KB 42-SDIP
Manufacturer
Toshiba
Series
TLCS-870/Cr
Datasheet
1.TMP86FH46ANGZ.pdf
(214 pages)
Specifications of TMP86FH46ANG(Z)
Core Processor
870/C
Core Size
8-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
LED, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-SDIP (0.600", 15.24mm)
Processor Series
TLCS-870
Core
870/C
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SIO, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
33
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
BMSKTOPAS86FH47(AND), BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP86C909XB - EMULATION CHIP FOR TMP86F SDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
TMP86FH46ANGZ
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10.3 Function
SIOSR<SEF>
SO pin
SIOSR<TXF>
SIOCR1<SIOS>
SIOSR<SIOF>
SCK pin outout
INTSIO
interrupt
request
SIOTDB
(2)
(3)
Figure 10-6 Example of Internal Clock and MSB Transmit Mode
Writing transmit
data A
stops to “H” level by an automatic-wait function when all of the bit set in the SIOTDB has been
transmitted. Automatic-wait function is released by writing a transmit data to SIOTDB. Then, trans-
mit operation is restarted after maximum 1-cycle of serial clock.
SIOSR<TXF> “1”, the next data is continuously transferred after transmission of previous data.
SIOTDB before the shift operation of the next data begins.
tion is started. Then, INTSIO interrupt request is generated after SIOSR<TXERR> is set to “1”.
During the transmit operation
When data is written to SIOTDB, SIOSR<TXF> is cleared to “0”.
In internal clock operation, in case a next transmit data is not written to SIOTDB, the serial clock
When the next data is written to the SIOTDB before termination of previous 8-bit data with
In external clock operation, after SIOSR<TXF> is set to “1”, the transmit data must be written to
If the transmit data is not written to SIOTDB, transmit error occurs immediately after shift opera-
Stopping the transmit operation
There are two ways for stopping transmits operation.
A
• The way of clearing SIOCR1<SIOS>.
• The way of setting SIOCR1<SIOINH>.
When SIOCR1<SIOS> is cleared to “0”, transmit operation is stopped after all transfer of the
data is finished. When transmit operation is finished, SIOSR<SIOF> is cleared to “0” and
SO pin is kept in high level.
In external clock operation, SIOCR1<SIOS> must be cleared to “0” before SIOSR<SEF> is
set to “1” by beginning next transfer.
Transmit operation is stopped immediately after SIOCR1<SIOINH> is set to “1”. In this
case, SIOCR1<SIOS>, SIOSR register, SIORDB register and SIOTDB register are initial-
ized.
A7
Writing transmit
data B
A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1
Start shift
operation
B
Page 110
Start shift
operation
B0
Automatic wait
Writing transmit
data C
C
C7
Start shift
operation
C6 C5 C4 C3 C2 C1 C0
Clearing SIOS
TMP86FH46ANG
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