HD64F3672FPV Renesas Electronics America, HD64F3672FPV Datasheet - Page 185

• Manufacturer Part Number: HD64F3672FPV
• Description: IC H8/3672 MCU FLASH 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3672FPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.2.54 (3) SHAR (L)
Notes
SHAR (SHift Arithmetic Right)
Operation
ERd (right arithmetic shift)
Assembly-Language Format
SHAR.L ERd
Operand Size
Longword
Description
This instruction shifts the bits in a 32-bit register ERd (destination operand) one bit to the right.
Bit 0 shifts into the carry flag. Bit 31 shifts into itself. Since bit 31 remains unaltered, the sign
does not change.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Register direct
Addressing
Mode
Mnemonic
SHAR.L
MSB
b
31
Operands
ERd
ERd
. . . . . .
1st byte
1
1
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Receives the previous value in bit 0.
2nd byte
B
cleared to 0.
cleared to 0.
cleared to 0.
Instruction Format
— —
Rev. 3.00 Dec 13, 2004 page 169 of 258
I
0 erd
UI
LSB
Section 2 Instruction Descriptions
b
0
— —
H
3rd byte
U
C
N
4th byte
REJ09B0213-0300
Shift Arithmetic
Z
V
0
States
No. of
C
2