HD64F3687GFP Renesas Electronics America, HD64F3687GFP Datasheet - Page 328

• Manufacturer Part Number: HD64F3687GFP
• Description: IC H8 MCU FLASH 56K 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3687GFP

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 56KB (56K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 16 Serial Communication Interface 3 (SCI3)
16.6.1
Figure 16.16 shows a sample flowchart for multiprocessor serial data transmission. For an ID
transmission cycle, set the MPBT bit in SSR to 1 before transmission. For a data transmission
cycle, clear the MPBT bit in SSR to 0 before transmission. All other SCI3 operations are the same
as those in asynchronous mode.
Rev.5.00 Nov. 02, 2005 Page 294 of 500
REJ09B0027-0500
[1]
[2]
[3]
Multiprocessor Serial Data Transmission
Figure 16.16 Sample Multiprocessor Serial Transmission Flowchart
Clear PDR to 0 and set PCR to 1
Write transmit data to TDR
Clear TE bit in SCR3 to 0
Read TDRE flag in SSR
Read TEND flag in SSR
Set MPBT bit in SSR
All data transmitted?
Start transmission
Break output?
TDRE = 1
TEND = 1
<End>
Yes
Yes
Yes
No
Yes
No
No
No
[1]
[2]
[3]
Read SSR and check that the TDRE
flag is set to 1, set the MPBT bit in
SSR to 0 or 1, then write transmit
data to TDR. When data is written to
TDR, the TDRE flag is automatically
cleared to 0.
To continue serial transmission, be
sure to read 1 from the TDRE flag to
confirm that writing is possible, then
write data to TDR. When data is
written to TDR, the TDRE flag is
automatically cleared to 0.
To output a break in serial
transmission, set the port PCR to 1,
clear PDR to 0, then clear the TE bit
in SCR3 to 0.