HD64F3687GFP Renesas Electronics America, HD64F3687GFP Datasheet - Page 61
![IC H8 MCU FLASH 56K 64-LQFP](/photos/28/61/286107/64-lqfp__plqp0064kc-a_sml.jpg)
HD64F3687GFP
Manufacturer Part Number
HD64F3687GFP
Description
IC H8 MCU FLASH 56K 64-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.HD64F3684GFPV.pdf
(538 pages)
Specifications of HD64F3687GFP
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Part Number:
HD64F3687GFP
Manufacturer:
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Quantity:
10 000
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HD64F3687GFPMV
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Table 2.6
Note:
Instruction
BSET
BCLR
BNOT
BTST
BAND
BIAND
BOR
BIOR
*
Refers to the operand size.
B: Byte
Bit Manipulation Instructions (1)
Size*
B
B
B
B
B
B
B
B
Function
1
Sets a specified bit in a general register or memory operand to 1. The bit
number is specified by 3-bit immediate data or the lower three bits of a
general register.
0
Clears a specified bit in a general register or memory operand to 0. The
bit number is specified by 3-bit immediate data or the lower three bits of
a general register.
¬ (<bit-No.> of <EAd>)
Inverts a specified bit in a general register or memory operand. The bit
number is specified by 3-bit immediate data or the lower three bits of a
general register.
¬ (<bit-No.> of <EAd>)
Tests a specified bit in a general register or memory operand and sets
or clears the Z flag accordingly. The bit number is specified by 3-bit
immediate data or the lower three bits of a general register.
C
ANDs the carry flag with a specified bit in a general register or memory
operand and stores the result in the carry flag.
C
ANDs the carry flag with the inverse of a specified bit in a general
register or memory operand and stores the result in the carry flag.
The bit number is specified by 3-bit immediate data.
C
ORs the carry flag with a specified bit in a general register or memory
operand and stores the result in the carry flag.
C
ORs the carry flag with the inverse of a specified bit in a general register
or memory operand and stores the result in the carry flag.
The bit number is specified by 3-bit immediate data.
¬ (<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
¬ (<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
Z
C
C
C
C
Rev.5.00 Nov. 02, 2005 Page 27 of 500
REJ09B0027-0500
Section 2 CPU
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