M30263F6AFP#U5 Renesas Electronics America, M30263F6AFP#U5 Datasheet - Page 328
![MCU 3/5V 48K PB-FREE 42-SSOP](/photos/28/61/286144/42-ssop_sml.jpg)
M30263F6AFP#U5
Manufacturer Part Number
M30263F6AFP#U5
Description
MCU 3/5V 48K PB-FREE 42-SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheet
1.M30260F3AGPU5A.pdf
(354 pages)
Specifications of M30263F6AFP#U5
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
33
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
42-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M
R
R
e
E
1
. v
J
6
0
C
2
9
0 .
2 /
B
0
0
6
19.7.1.3 Timer A (One-shot Timer Mode)
2
A
0
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
2. When setting TAiS bit to “0” (count stop), the following occur:
3. Output in one-shot timer mode synchronizes with a count source internally generated. When the
4. The IR bit is set to “1” when timer operation mode is set with any of the following procedures:
5. When a trigger occurs while the timer is counting, the counter reloads the reload register value, and
6. When selecting the external trigger for the count start conditions in timer A one-shot timer mode, do
7. If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to “1”
F
2
e
G
0 -
(i = 0 to 4) register, the TAi register, the TA0TGL and TA0TGH bits in the ONSF register and the
TRGSR register before setting the TAiS bit in the TABSR register to “1” (count starts).
Always make sure the TAiMR register, the TA0TGL and TA0TGH bits and the TRGSR register are
modified while the TAiS bit remains “0” (count stops) regardless whether after reset or not.
• The counter stops counting and the content of reload register is reloaded.
• TAi
• After one cycle of the CPU clock, the IR bit in the TAiIC register is set to “1” (interrupt request).
external trigger has been selected, a maximun delay of one cycle of the count source occurs be-
tween the trigger input to TAi
• Select one-shot timer mode after reset.
• Change the operation mode from timer mode to one-shot timer mode.
• Change the operation mode from event counter mode to one-shot timer mode.
been made.
continues counting after a second trigger is generated and the counter is decremented once. To
generate a trigger while counting, space more than one cycle of the timer count source from the first
trigger and generate again.
generate an external trigger 300ns before the count value of timer A is set to “0000
timer does not continue counting and may stop.
(three-phase output forcible cutoff by input on SD pin enabled), the TA1
pins go to a high-impedance state.
b
To use the timer Ai interrupt (the IR bit), set the IR bit to “0” after the changes listed above have
o r
1 .
2
0
u
, 5
0
p
OUT
2
(
0
M
0
7
1
pin outputs “L”.
6
C
page 309
2 /
6
, A
M
1
f o
6
C
3
2
2 /
9
6
, B
IN
M
pin and output in one-shot timer mode.
1
6
C
_____
2 /
6
) T
_____
OUT
, TA2
16
OUT
”. The one-shot
19. Usage Notes
and TA4
OUT
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