HD64F3642AH Renesas Electronics America, HD64F3642AH Datasheet - Page 165

• Manufacturer Part Number: HD64F3642AH
• Description: IC H8 MCU FLASH 16K 64QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3642AH

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

LOOPE:
;
EVR:
LOOPEV: DEC
EBRTST: CMP.B #H'0C,
EBR2EV: BTST
ADD01:
ERASE1: BRA
ERSEVF: MOV.W @R2+,
Execute erase-verify
MOV.W #H'e5A,
MOV.B R4L,
MOV.B R4H,
MOV.B #H'36,
MOV.B R4L,
MOV.W R5,
BSET
NOP
NOP
NOP
NOP
SUBS
MOV.W R4,
BNE
BCLR
MOV.B #H'50,
MOV.B R4L,
MOV.W #RAMSTR, R2
MOV.W #ERVADR, R3
ADD.W R3,
MOV.W #START,
SUB.W R3,
MOV.B #H'00,
MOV.B #H'b,
BSET
BNE
BEQ
CMP.B #H'08,
BMI
MOV.B R1L,
SUBX
BTST
BNE
BRA
BNE
INC
MOV.W @R2+,
BRA
#1,
#1,
LOOPE
#1,
#3,
R4H
LOOPEV
HANTEI
EBR2EV
#H'08,
R1H,
ERSEVF
ADD01
R1L,
ERSEVF
R1L
EBRTST
ERASE
R4
@TCSRW:8 ;
@TCW:8
R4L
@TCSRW:8 ;
R4
@FLMCR:8 ;
R4
R4
@FLMCR:8 ;
R4L
@TCSRW:8 ;
R2
R3
R2
R1L
R4H
@FLMCR:8 ;
R1L
R1L
R1H
R1H
R0H
R0L
R3
R3
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
Start watchdog timer
Set erase loop counter
Set E bit
Wait loop
Clear E bit
Stop watchdog timer
Transfer destination start address (RAM)
#RAMSTR + #ERVADR
Address of data area used in RAM
Used to test bit R1L in R0
Set erase-verify loop counter
Set EV bit
Wait loop
R1L = H'0C?
If finished checking all R0 bits, branch to HANTEI
If R1L ≥ 8, EBR1 test; if R1L < 8, EBR2 test
R1L – 8
Test bit R1H in EBR1 (R0H)
If bit R1H in EBR1 (R0H) is 1, branch to ERSEVF
If bit R1H in EBR1 (R0H) is 0, branch to ADD01
Test bit R1L in EBR2 (R0L)
If bit R1L in EBR2 (R0L) is 1, branch to ERSEVF
R1L + 1
Dummy-increment R2
Branch to ERASE via ERASE1
Start address of block to be erase-verified
Rev. 6.00 Sep 12, 2006 page 143 of 526
R1H
R1L
R2
REJ09B0326-0600
Section 6 ROM