HD64F3642AH Renesas Electronics America, HD64F3642AH Datasheet - Page 264

IC H8 MCU FLASH 16K 64QFP

HD64F3642AH

Manufacturer Part Number
HD64F3642AH
Description
IC H8 MCU FLASH 16K 64QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3642AH

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 9 Timers
9.5.2
Free-Running Counter (FRC)
Free-Running Counter H (FRCH)
Free-Running Counter L (FRCL)
FRC is a 16-bit read/write up-counter, which is incremented by internal or external clock input.
The clock source is selected by bits CKS1 and CKS0 in TCRX.
FRC can be cleared by compare match A, depending on the setting of CCLRA in TCSRX.
When FRC overflows from H'FFFF to H'0000, OVF is set to 1 in TCSRX. If OVIE = 1 in TIER, a
CPU interrupt is requested.
FRC can be written and read by the CPU. Since FRC has 16 bits, data is transferred between the
CPU and FRC via a temporary register (TEMP). For details see section 9.5.3, CPU Interface.
FRC is initialized to H'0000 upon reset and in standby mode, watch mode, subsleep mode, and
subactive mode.
Output Compare Registers A and B (OCRA, OCRB)
Output Compare Registers AH and BH (OCRAH, OCRBH)
Output Compare Registers AL and BL (OCRAL, OCRBL)
Rev. 6.00 Sep 12, 2006 page 242 of 526
REJ09B0326-0600
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Register Descriptions
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
15
15
0
1
14
14
0
1
13
13
OCRAH, OCRBH
0
1
12
12
0
FRCH
1
11
11
0
1
10
10
0
1
9
0
9
1
OCRA, OCRB
8
0
8
1
FRC
7
0
7
1
6
0
6
1
5
0
5
1
OCRAL, OCRBL
4
0
4
1
FRCL
3
0
3
1
2
0
2
1
1
0
1
1
0
0
0
1

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