DF2212CUNP24V Renesas Electronics America, DF2212CUNP24V Datasheet - Page 122
![MCU 16BIT FLASH 3V 128K 64-QFN](/photos/28/61/286186/64-vfqfn_sml.jpg)
DF2212CUNP24V
Manufacturer Part Number
DF2212CUNP24V
Description
MCU 16BIT FLASH 3V 128K 64-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2218UTF24V.pdf
(758 pages)
Specifications of DF2212CUNP24V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Quantity
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Part Number:
DF2212CUNP24V
Manufacturer:
Renesas Electronics America
Quantity:
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2.9
2.9.1
Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction. The TAS
instruction is not generated by the Renesas Technology H8S and H8/300 Series C/C++ compilers.
If the TAS instruction is used as a user-defined intrinsic function, ensure that only register ER0,
ER1, ER4, or ER5 is used.
2.9.2
With the STM or LDM instruction, the ER7 register is used as the stack pointer, and thus cannot
be used as a register that allows save (STM) or restore (LDM) operation.
With a single STM or LDM instruction, two to four registers can be saved or restored. The
available registers are as follows:
For two registers: ER0 and ER1, ER2 and ER3, or ER4 and ER5
For three registers: ER0 to ER2, or ER4 to ER6
For four registers: ER0 to ER3
For the Renesas Technology H8S or H8/300 Series C/C++ Compiler, the STM/LDM instruction
including ER7 is not created.
2.9.3
Using bit manipulation instructions on registers containing write-only bits can result in the bits that
should have been manipulated not being manipulated as intended or in the wrong bits being
manipulated.
Reading data from a register containing write-only bits may return fixed or undefined values.
Consequently, bit manipulation instructions that use the read values to perform operations (BNOT,
BTST, BAND, BIAND, BOR, BIOR, BXOR, BIXOR, BLD, and BILD) will not work properly.
In addition, bit manipulation instructions that write data following operations based on the data
values read (BSET, BCLR, BNOT, BST, and BIST) may change the values of bits unrelated to the
intended bit manipulation. Therefore, caution is necessary when using bit manipulation
instructions on registers containing write-only bits.
Rev.7.00 Dec. 24, 2008 Page 66 of 698
REJ09B0074-0700
Usage Notes
Note on TAS Instruction Usage
STM/LTM Instruction Usage
Note on Bit Manipulation Instructions
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